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Re: [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations
From: |
Alistair Francis |
Subject: |
Re: [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations |
Date: |
Thu, 2 Jul 2020 14:46:16 -0700 |
On Wed, Jul 1, 2020 at 10:00 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The smin/smax/umin/umax operations require the operands to be
> properly sign extended. Do not drop the MO_SIGN bit from the
> load, and additionally extend the val input.
>
> Reported-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Applied to riscv-to-apply.next
Alistair
> ---
> tcg/tcg-op.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
> index e60b74fb82..4b8a473fad 100644
> --- a/tcg/tcg-op.c
> +++ b/tcg/tcg-op.c
> @@ -3189,8 +3189,9 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv
> addr, TCGv_i32 val,
>
> memop = tcg_canonicalize_memop(memop, 0, 0);
>
> - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i32(t1, addr, idx, memop);
> + tcg_gen_ext_i32(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i32(t2, addr, idx, memop);
>
> tcg_gen_ext_i32(ret, (new_val ? t2 : t1), memop);
> @@ -3232,8 +3233,9 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv
> addr, TCGv_i64 val,
>
> memop = tcg_canonicalize_memop(memop, 1, 0);
>
> - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i64(t1, addr, idx, memop);
> + tcg_gen_ext_i64(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i64(t2, addr, idx, memop);
>
> tcg_gen_ext_i64(ret, (new_val ? t2 : t1), memop);
> --
> 2.25.1
>
>