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Re: [PATCH v1 1/1] target/microblaze: Add MFS Rd,EDR translation
From: |
Luc Michel |
Subject: |
Re: [PATCH v1 1/1] target/microblaze: Add MFS Rd,EDR translation |
Date: |
Wed, 13 May 2020 09:42:50 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 5/12/20 4:36 PM, Edgar E. Iglesias wrote:
> From: Tong Ho <address@hidden>
>
> This is to fix cpu-abort with 'qemu: fatal: unknown mfs reg d'
> (in the default case) when microblaze guest issues 'MFS Rd,EDR'
> instruction.
>
> Since embeddedsw release 2019.2, XPlm_ExceptionHandler() issues
> the instruction on exception, and microblaze model aborts when
> PLM firmware guest encounters an exception.
>
> Signed-off-by: Tong Ho <address@hidden>
> Reviewed-by: Edgar E. Iglesias <address@hidden>
> Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
> ---
> target/microblaze/translate.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index 20b7427811..92b3630804 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -581,6 +581,7 @@ static void dec_msr(DisasContext *dc)
> case SR_ESR:
> case SR_FSR:
> case SR_BTR:
> + case SR_EDR:
> tcg_gen_extrl_i64_i32(cpu_R[dc->rd], cpu_SR[sr]);
> break;
> case 0x800:
>