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[PULL 32/34] hw/arm/musicpal: Map the UART devices unconditionally
From: |
Peter Maydell |
Subject: |
[PULL 32/34] hw/arm/musicpal: Map the UART devices unconditionally |
Date: |
Mon, 11 May 2020 14:34:03 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
I can't find proper documentation or datasheet, but it is likely
a MMIO mapped serial device mapped in the 0x80000000..0x8000ffff
range belongs to the SoC address space, thus is always mapped in
the memory bus.
Map the devices on the bus regardless a chardev is attached to it.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Jan Kiszka <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/musicpal.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index b2d0cfdac8a..92f33ed87ed 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1619,14 +1619,10 @@ static void musicpal_init(MachineState *machine)
pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],
pic[MP_TIMER4_IRQ], NULL);
- if (serial_hd(0)) {
- serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
- 1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN);
- }
- if (serial_hd(1)) {
- serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
- 1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN);
- }
+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
+ 1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
+ 1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN);
/* Register flash */
dinfo = drive_get(IF_PFLASH, 0, 0);
--
2.20.1
- [PULL 24/34] target/arm: Reuse sve_probe_page for scatter stores, (continued)
- [PULL 24/34] target/arm: Reuse sve_probe_page for scatter stores, Peter Maydell, 2020/05/11
- [PULL 23/34] target/arm: Reuse sve_probe_page for gather first-fault loads, Peter Maydell, 2020/05/11
- [PULL 22/34] target/arm: Use SVEContLdSt for contiguous stores, Peter Maydell, 2020/05/11
- [PULL 26/34] target/arm: Remove sve_memopidx, Peter Maydell, 2020/05/11
- [PULL 21/34] target/arm: Update contiguous first-fault and no-fault loads, Peter Maydell, 2020/05/11
- [PULL 27/34] target/arm/kvm: Inline set_feature() calls, Peter Maydell, 2020/05/11
- [PULL 28/34] target/arm: Make set_feature() available for other files, Peter Maydell, 2020/05/11
- [PULL 29/34] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[], Peter Maydell, 2020/05/11
- [PULL 30/34] target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs, Peter Maydell, 2020/05/11
- [PULL 25/34] target/arm: Reuse sve_probe_page for gather loads, Peter Maydell, 2020/05/11
- [PULL 32/34] hw/arm/musicpal: Map the UART devices unconditionally,
Peter Maydell <=
- [PULL 33/34] target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA, Peter Maydell, 2020/05/11
- [PULL 34/34] target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed), Peter Maydell, 2020/05/11
- [PULL 31/34] target/arm: Restrict TCG cpus to TCG accel, Peter Maydell, 2020/05/11
- Re: [PULL 00/34] target-arm queue, Peter Maydell, 2020/05/11
- Re: [PULL 00/34] target-arm queue, no-reply, 2020/05/11
- Re: [PULL 00/34] target-arm queue, Peter Maydell, 2020/05/11