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Re: [PATCH] target/m68k: Allow movec only on 68010+


From: BALATON Zoltan
Subject: Re: [PATCH] target/m68k: Allow movec only on 68010+
Date: Sat, 2 May 2020 03:38:25 +0200 (CEST)
User-agent: Alpine 2.22 (BSF 395 2020-01-19)

On Fri, 1 May 2020, Laurent Vivier wrote:
Le 01/05/2020 à 15:11, BALATON Zoltan a écrit :
Ping?

I sent a comment:

https://lists.gnu.org/archive/html/qemu-devel/2020-01/msg02840.html

Thanks, I've somehow missed that, did not show up in my inbox for some reason. I wasn't sure about the FPU flag but did not find a better one without adding new flag for 68010. Lucien's patch is indeed more complete and should fix the same problem. So will that be merged then?

Regards,
BALATON Zoltan

Thanks,
Laurent


On Tue, 14 Jan 2020, BALATON Zoltan wrote:
The movec opcode does not exist on 68000 and should raise an
exception. Fix the feature mask to only allow movec on newer 68k CPUs.

Signed-off-by: BALATON Zoltan <address@hidden>
---
target/m68k/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index fcdb7bc8e4..f19da064c8 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5988,7 +5988,7 @@ void register_m68k_insns (CPUM68KState *env)
    BASE(stop,      4e72, ffff);
    BASE(rte,       4e73, ffff);
    INSN(cf_movec,  4e7b, ffff, CF_ISA_A);
-    INSN(m68k_movec, 4e7a, fffe, M68000);
+    INSN(m68k_movec, 4e7a, fffe, FPU);
#endif
    BASE(nop,       4e71, ffff);
    INSN(rtd,       4e74, ffff, RTD);



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