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[PATCH 4/6] target/arm: Remove unnecessary range check for VSHL
From: |
Richard Henderson |
Subject: |
[PATCH 4/6] target/arm: Remove unnecessary range check for VSHL |
Date: |
Fri, 1 May 2020 14:13:43 -0700 |
In 1dc8425e551, while converting to gvec, I added an extra range check
against the shift count. This was unnecessary because the encoding of
the shift count produces 0 to the element size - 1.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index f730eb5b75..f082384117 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6126,16 +6126,8 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
gen_gvec_sli(size, rd_ofs, rm_ofs, shift,
vec_size, vec_size);
} else { /* VSHL */
- /* Shifts larger than the element size are
- * architecturally valid and results in zero.
- */
- if (shift >= 8 << size) {
- tcg_gen_gvec_dup_imm(size, rd_ofs,
- vec_size, vec_size, 0);
- } else {
- tcg_gen_gvec_shli(size, rd_ofs, rm_ofs, shift,
- vec_size, vec_size);
- }
+ tcg_gen_gvec_shli(size, rd_ofs, rm_ofs, shift,
+ vec_size, vec_size);
}
return 0;
}
--
2.20.1
- [PATCH 0/6] target/arm: partial vector cleanup, Richard Henderson, 2020/05/01
- [PATCH 1/6] target/arm: Create gen_gvec_[us]sra, Richard Henderson, 2020/05/01
- [PATCH 4/6] target/arm: Remove unnecessary range check for VSHL,
Richard Henderson <=
- [PATCH 2/6] target/arm: Create gen_gvec_{u,s}{rshr,rsra}, Richard Henderson, 2020/05/01
- [PATCH 3/6] target/arm: Create gen_gvec_{sri,sli}, Richard Henderson, 2020/05/01
- [PATCH 5/6] target/arm: Tidy handle_vec_simd_shri, Richard Henderson, 2020/05/01
- [PATCH 6/6] target/arm: Wrap vector compare zero GVecGen2 in GVecGen2Fn, Richard Henderson, 2020/05/01