Re: Sudden slowdown of ARM emulation in master

[Mark Cave-Ayland]

On 26/02/2020 10:03, Peter Maydell wrote:

>> On Wed, 26 Feb 2020 00:07:55 +0100
>> Niek Linnenbank <address@hidden> wrote:
>>
>>> Hello Igor and Paolo,
>>
>> does following hack solves issue?
>>
>> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
>> index a08ab11f65..ab2448c5aa 100644
>> --- a/accel/tcg/translate-all.c
>> +++ b/accel/tcg/translate-all.c
>> @@ -944,7 +944,7 @@ static inline size_t size_code_gen_buffer(size_t tb_size)
>>          /* ??? If we relax the requirement that CONFIG_USER_ONLY use the
>>             static buffer, we could size this on RESERVED_VA, on the text
>>             segment size of the executable, or continue to use the default.  
>> */
>> -        tb_size = (unsigned long)(ram_size / 4);
>> +        tb_size = MAX_CODE_GEN_BUFFER_SIZE;
>>  #endif
>>      }
>>      if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
> 
> Cc'ing Richard to ask: does it still make sense for TCG
> to pick a codegen buffer size based on the guest RAM size?
> (We should fix the regression anyway, but it surprised me
> slightly to find a config detail of the guest machine being
> used here.)

FWIW the NetBSD guys have been running their QEMU-based CI for some time now 
with an
extra -tb-size parameter to improve performance: http://gnats.netbsd.org/52184.


ATB,

Mark.