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Re: [Bug 1859291] [NEW] RISC-V incorrect exception generated


From: Alistair Francis
Subject: Re: [Bug 1859291] [NEW] RISC-V incorrect exception generated
Date: Fri, 31 Jan 2020 17:24:41 -0800

Do you have steps to reproduce this?

Alistair

On Sat, Jan 11, 2020 at 8:25 AM Teodori Serge <address@hidden> wrote:
>
> Public bug reported:
>
> When using 'ecall' from supervisor mode, user exception is raised
> instead of supervisor exception. The problem is located under
> 'target/riscv/insn_trans/trans_priviledged.inc.c' in function 'static
> bool trans_ecall(DisasContext *ctx, arg_ecall *a)'. Best regards, Serge
> Teodori
>
> ** Affects: qemu
>      Importance: Undecided
>          Status: New
>
>
> ** Tags: risc-v
>
> --
> You received this bug notification because you are a member of qemu-
> devel-ml, which is subscribed to QEMU.
> https://bugs.launchpad.net/bugs/1859291
>
> Title:
>   RISC-V incorrect exception generated
>
> Status in QEMU:
>   New
>
> Bug description:
>   When using 'ecall' from supervisor mode, user exception is raised
>   instead of supervisor exception. The problem is located under
>   'target/riscv/insn_trans/trans_priviledged.inc.c' in function 'static
>   bool trans_ecall(DisasContext *ctx, arg_ecall *a)'. Best regards,
>   Serge Teodori
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/qemu/+bug/1859291/+subscriptions
>



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