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[PULL 20/26] hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBA
From: |
Peter Maydell |
Subject: |
[PULL 20/26] hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit |
Date: |
Thu, 30 Jan 2020 16:15:27 +0000 |
From: Zenghui Yu <address@hidden>
If LPIs are disabled, KVM will just ignore the GICR_PENDBASER.PTZ bit when
restoring GICR_CTLR. Setting PTZ here makes littlt sense in "reduce GIC
initialization time".
And what's worse, PTZ is generally programmed by guest to indicate to the
Redistributor whether the LPI Pending table is zero when enabling LPIs.
If migration is triggered when the PTZ has just been cleared by guest (and
before enabling LPIs), we will see PTZ==1 on the destination side, which
is not as expected. Let's just drop this hackish userspace behavior.
Also take this chance to refine the comment a bit.
Fixes: 367b9f527bec ("hw/intc/arm_gicv3_kvm: Implement get/put functions")
Signed-off-by: Zenghui Yu <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/arm_gicv3_kvm.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 9c7f4ab8711..49304ca589d 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -336,7 +336,10 @@ static void kvm_arm_gicv3_put(GICv3State *s)
kvm_gicd_access(s, GICD_CTLR, ®, true);
if (redist_typer & GICR_TYPER_PLPIS) {
- /* Set base addresses before LPIs are enabled by GICR_CTLR write */
+ /*
+ * Restore base addresses before LPIs are potentially enabled by
+ * GICR_CTLR write
+ */
for (ncpu = 0; ncpu < s->num_cpu; ncpu++) {
GICv3CPUState *c = &s->cpu[ncpu];
@@ -347,12 +350,6 @@ static void kvm_arm_gicv3_put(GICv3State *s)
kvm_gicr_access(s, GICR_PROPBASER + 4, ncpu, ®h, true);
reg64 = c->gicr_pendbaser;
- if (!(c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS)) {
- /* Setting PTZ is advised if LPIs are disabled, to reduce
- * GIC initialization time.
- */
- reg64 |= GICR_PENDBASER_PTZ;
- }
regl = (uint32_t)reg64;
kvm_gicr_access(s, GICR_PENDBASER, ncpu, ®l, true);
regh = (uint32_t)(reg64 >> 32);
--
2.20.1
- [PULL 12/26] hw/core: add Resettable support to BusClass and DeviceClass, (continued)
- [PULL 12/26] hw/core: add Resettable support to BusClass and DeviceClass, Peter Maydell, 2020/01/30
- [PULL 14/26] hw/core/qdev: handle parent bus change regarding resettable, Peter Maydell, 2020/01/30
- [PULL 13/26] hw/core/resettable: add support for changing parent, Peter Maydell, 2020/01/30
- [PULL 16/26] hw/core: deprecate old reset functions and introduce new ones, Peter Maydell, 2020/01/30
- [PULL 19/26] hw/s390x/ipl: replace deprecated qdev_reset_all registration, Peter Maydell, 2020/01/30
- [PULL 22/26] hw/arm/virt: Add missing 5.0 options call to 4.2 options, Peter Maydell, 2020/01/30
- [PULL 11/26] hw/core: create Resettable QOM interface, Peter Maydell, 2020/01/30
- [PULL 15/26] hw/core/qdev: update hotplug reset regarding resettable, Peter Maydell, 2020/01/30
- [PULL 21/26] target/arm/kvm: trivial: Clean up header documentation, Peter Maydell, 2020/01/30
- [PULL 25/26] target/arm/kvm: Implement virtual time adjustment, Peter Maydell, 2020/01/30
- [PULL 20/26] hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit,
Peter Maydell <=
- [PULL 18/26] vl: replace deprecated qbus_reset_all registration, Peter Maydell, 2020/01/30
- [PULL 17/26] docs/devel/reset.rst: add doc about Resettable interface, Peter Maydell, 2020/01/30
- [PULL 23/26] target/arm/kvm64: kvm64 cpus have timer registers, Peter Maydell, 2020/01/30
- [PULL 26/26] target/arm/cpu: Add the kvm-no-adjvtime CPU property, Peter Maydell, 2020/01/30
- [PULL 24/26] tests/arm-cpu-features: Check feature default values, Peter Maydell, 2020/01/30
- Re: [PULL 00/26] target-arm queue, Peter Maydell, 2020/01/30