Re: [PULL 0/6] MIPS queue for January 28th, 2020

[Philippe Mathieu-Daudé]

Hi Peter,

On 1/28/20 9:09 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <address@hidden>
>
> The following changes since commit 4c60e3289875ae6c516a37523bcecb87f68ce67c:
>
>    Merge remote-tracking branch 'remotes/rth/tags/pull-pa-20200127' into 
> staging (2020-01-28 15:11:04 +0000)
>
> are available in the git repository at:
>
>    https://github.com/AMarkovic/qemu tags/mips-queue-jan-28-2020
>
> for you to fetch changes up to 370bf3a4196ebef247752a68b89d497522168ebb:
>
>    target/mips: Add implementation of GINVT instruction (2020-01-28 20:52:20 
> +0100)
>
> ----------------------------------------------------------------
>
> MIPS queue for January 28th, 2020
>
>    A diverse set of fixes and improvements:
>
>      - finalize documentation on deprecating r4k machine
>      - enable disassembler to receive target-specific data
>      - enable kernel loader to get e_flags from ELF header
>      - improve code flow in helper_do_semihosting()
>      - amend CP0 WatchHi register implementation
>      - add GINVT instruction emulation
>
> ----------------------------------------------------------------
>
> Aleksandar Markovic (2):
>    target/mips: Rectify documentation on deprecating r4k machine
>    disas: Add a field for target-dependant data
>
> Daniel Henrique Barboza (1):
>    mips-semi.c: remove 'uhi_done' label in helper_do_semihosting()
>
> Philippe Mathieu-Daudé (1):
>    hw/core/loader: Let load_elf() populate the processor-specific flags

Do you mind holding this pull request? I don't feel comfortable being 
listed as the author of this patch. I'll discuss it on the patch thread 
with Aleksandar.

> Yongbok Kim (2):
>    target/mips: Amend CP0 WatchHi register implementation
>    target/mips: Add implementation of GINVT instruction