Re: [PATCH] riscv: Add semihosting support [v3]

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [PATCH] riscv: Add semihosting support [v3]

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
a3ca2be riscv: Add semihosting support [v3]

=== OUTPUT BEGIN ===
WARNING: Block comments use a leading /* on a separate line
#131: FILE: target/riscv/insn_trans/trans_privileged.inc.c:36:
+    /* The RISC-V semihosting spec specifies the following

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#153: 
new file mode 100644

WARNING: Block comments use a leading /* on a separate line
#223: FILE: target/riscv/riscv-semi.c:66:
+/* ADP_Stopped_ApplicationExit is used for exit(0),

WARNING: Block comments use a trailing */ on a separate line
#224: FILE: target/riscv/riscv-semi.c:67:
+ * anything else is implemented as exit(1) */

WARNING: Block comments use a leading /* on a separate line
#453: FILE: target/riscv/riscv-semi.c:296:
+    /* Return an address in target memory of 64 bytes where the remote

WARNING: Block comments use a leading /* on a separate line
#470: FILE: target/riscv/riscv-semi.c:313:
+    /* The size is always stored in big-endian order, extract

WARNING: Block comments use * on subsequent lines
#471: FILE: target/riscv/riscv-semi.c:314:
+    /* The size is always stored in big-endian order, extract
+       the value. We assume the size always fit in 32 bits.  */

WARNING: Block comments use a trailing */ on a separate line
#471: FILE: target/riscv/riscv-semi.c:314:
+       the value. We assume the size always fit in 32 bits.  */

WARNING: Block comments use a leading /* on a separate line
#778: FILE: target/riscv/riscv-semi.c:621:
+/* Read the input value from the argument block; fail the semihosting

ERROR: "foo * bar" should be "foo *bar"
#806: FILE: target/riscv/riscv-semi.c:649:
+    char * s;

WARNING: line over 80 characters
#875: FILE: target/riscv/riscv-semi.c:718:
+            ret = riscv_gdb_syscall(cpu, riscv_semi_open_cb, "open,%s,%x,1a4", 
arg0,

ERROR: spaces required around that '+' (ctx:VxV)
#876: FILE: target/riscv/riscv-semi.c:719:
+                                  (int)arg2+1, gdb_open_modeflags[arg1]);
                                            ^

ERROR: spaces required around that '+' (ctx:VxV)
#973: FILE: target/riscv/riscv-semi.c:816:
+                                  arg0, (int)arg1+1);
                                                  ^

ERROR: spaces required around that '+' (ctx:VxV)
#991: FILE: target/riscv/riscv-semi.c:834:
+                                   arg0, (int)arg1+1, arg2, (int)arg3+1);
                                                   ^

ERROR: spaces required around that '+' (ctx:VxV)
#991: FILE: target/riscv/riscv-semi.c:834:
+                                   arg0, (int)arg1+1, arg2, (int)arg3+1);
                                                                      ^

ERROR: braces {} are necessary for all arms of this statement
#1002: FILE: target/riscv/riscv-semi.c:845:
+            if (s2)
[...]

ERROR: braces {} are necessary for all arms of this statement
#1004: FILE: target/riscv/riscv-semi.c:847:
+            if (s)
[...]

ERROR: spaces required around that '+' (ctx:VxV)
#1017: FILE: target/riscv/riscv-semi.c:860:
+                                   arg0, (int)arg1+1);
                                                   ^

WARNING: Block comments use a leading /* on a separate line
#1032: FILE: target/riscv/riscv-semi.c:875:
+            /* Build a command-line from the original argv.

WARNING: line over 80 characters
#1176: FILE: target/riscv/riscv-semi.c:1019:
+                fail = put_user_ual(retvals[i], arg0 + i * 
sizeof(target_ulong));

total: 8 errors, 12 warnings, 1197 lines checked

Commit a3ca2be73efc (riscv: Add semihosting support [v3]) has style problems, 
please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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