[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 21/38] target/i386: Fix handling of k_gs_base register in 32-bit m
From: |
Paolo Bonzini |
Subject: |
[PULL 21/38] target/i386: Fix handling of k_gs_base register in 32-bit mode in gdbstub |
Date: |
Wed, 8 Jan 2020 13:32:38 +0100 |
From: "address@hidden" <address@hidden>
gdb-xml/i386-32bit.xml includes the k_gs_base register too, so we have to
handle it even if TARGET_X86_64 is not defined. This is already done in
x86_cpu_gdb_read_register, but not in x86_cpu_gdb_write_register where the
incorrect return value causes all registers after it to be clobbered.
Fixes https://bugs.launchpad.net/qemu/+bug/1857640.
Signed-off-by: Marek Dolata <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target/i386/gdbstub.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index aef25b7..572ead6 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -350,15 +350,15 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t
*mem_buf, int n)
env->segs[R_GS].base = ldl_p(mem_buf);
return 4;
-#ifdef TARGET_X86_64
case IDX_SEG_REGS + 8:
+#ifdef TARGET_X86_64
if (env->hflags & HF_CS64_MASK) {
env->kernelgsbase = ldq_p(mem_buf);
return 8;
}
env->kernelgsbase = ldl_p(mem_buf);
- return 4;
#endif
+ return 4;
case IDX_FP_REGS + 8:
cpu_set_fpuc(env, ldl_p(mem_buf));
--
1.8.3.1
- [PULL 11/38] hw/i386/Kconfig: Let the MicroVM machine select the SERIAL_ISA config, (continued)
- [PULL 11/38] hw/i386/Kconfig: Let the MicroVM machine select the SERIAL_ISA config, Paolo Bonzini, 2020/01/08
- [PULL 12/38] hw/ppc/Kconfig: Restrict the MPC I2C controller to e500-based platforms, Paolo Bonzini, 2020/01/08
- [PULL 13/38] hw/ppc/Kconfig: Let the Sam460ex board use the PowerPC 405 devices, Paolo Bonzini, 2020/01/08
- [PULL 14/38] hw/ppc/Kconfig: Let the Xilinx Virtex5 ML507 use the PPC-440 devices, Paolo Bonzini, 2020/01/08
- [PULL 15/38] hw/ppc/Makefile: Simplify the sPAPR PCI objects rule, Paolo Bonzini, 2020/01/08
- [PULL 16/38] hw/ppc/Kconfig: Only select fw_cfg with machines using OpenBIOS, Paolo Bonzini, 2020/01/08
- [PULL 17/38] hw/ppc/Kconfig: Only select FDT helper for machines using it, Paolo Bonzini, 2020/01/08
- [PULL 19/38] hw/nvram/Kconfig: Restrict CHRP NVRAM to machines using OpenBIOS or SLOF, Paolo Bonzini, 2020/01/08
- [PULL 18/38] hw/nvram/Kconfig: Add an entry for the NMC93xx EEPROM, Paolo Bonzini, 2020/01/08
- [PULL 20/38] hw/rtc/mc146818: Add missing dependency on ISA Bus, Paolo Bonzini, 2020/01/08
- [PULL 21/38] target/i386: Fix handling of k_gs_base register in 32-bit mode in gdbstub,
Paolo Bonzini <=
- [PULL 22/38] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES, Paolo Bonzini, 2020/01/08
- [PULL 23/38] target/i386: Add missed features to Cooperlake CPU model, Paolo Bonzini, 2020/01/08
- [PULL 25/38] hw/ipmi: Explicit we ignore some QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 24/38] hw/ipmi: Remove unnecessary declarations, Paolo Bonzini, 2020/01/08
- [PULL 26/38] hw/char/terminal3270: Explicit ignored QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 27/38] hw/usb/dev-serial: Explicit we ignore few QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 28/38] hw/usb/redirect: Explicit we ignore few QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 29/38] ccid-card-passthru: Explicit we ignore QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 30/38] vhost-user-crypto: Explicit we ignore some QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08
- [PULL 31/38] vhost-user-net: Explicit we ignore few QEMUChrEvent in IOEventHandler, Paolo Bonzini, 2020/01/08