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[PULL 06/26] mos6522: remove anh register
From: |
David Gibson |
Subject: |
[PULL 06/26] mos6522: remove anh register |
Date: |
Wed, 8 Jan 2020 16:22:52 +1100 |
From: Laurent Vivier <address@hidden>
Register addr 1 is defined as buffer A with handshake (vBufAH),
register addr 15 is also defined as buffer A without handshake (vBufA).
As both addresses access the same register, remove the definition of
'anh' and use only 'a' (with VIA_REG_ANH and VIA_REG_A).
Fixes: 51f233ec92cd ("misc: introduce new mos6522 VIA device and enable it for
ppc builds")
Signed-off-by: Laurent Vivier <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/misc/mos6522.c | 16 ++++++++--------
include/hw/misc/mos6522.h | 1 -
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index cecf0be59e..10b85bf751 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -244,6 +244,9 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned
size)
val = s->b;
break;
case VIA_REG_A:
+ qemu_log_mask(LOG_UNIMP, "Read access to register A with handshake");
+ /* fall through */
+ case VIA_REG_ANH:
val = s->a;
break;
case VIA_REG_DIRB:
@@ -297,9 +300,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned
size)
val = s->ier | 0x80;
break;
default:
- case VIA_REG_ANH:
- val = s->anh;
- break;
+ g_assert_not_reached();
}
if (addr != VIA_REG_IFR || val != 0) {
@@ -322,6 +323,9 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
mdc->portB_write(s);
break;
case VIA_REG_A:
+ qemu_log_mask(LOG_UNIMP, "Write access to register A with handshake");
+ /* fall through */
+ case VIA_REG_ANH:
s->a = (s->a & ~s->dira) | (val & s->dira);
mdc->portA_write(s);
break;
@@ -395,9 +399,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
break;
default:
- case VIA_REG_ANH:
- s->anh = val;
- break;
+ g_assert_not_reached();
}
}
@@ -439,7 +441,6 @@ const VMStateDescription vmstate_mos6522 = {
VMSTATE_UINT8(pcr, MOS6522State),
VMSTATE_UINT8(ifr, MOS6522State),
VMSTATE_UINT8(ier, MOS6522State),
- VMSTATE_UINT8(anh, MOS6522State),
VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0,
vmstate_mos6522_timer, MOS6522Timer),
VMSTATE_END_OF_LIST()
@@ -460,7 +461,6 @@ static void mos6522_reset(DeviceState *dev)
s->ifr = 0;
s->ier = 0;
/* s->ier = T1_INT | SR_INT; */
- s->anh = 0;
s->timers[0].frequency = s->frequency;
s->timers[0].latch = 0xffff;
diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h
index 493c907537..97384c6e02 100644
--- a/include/hw/misc/mos6522.h
+++ b/include/hw/misc/mos6522.h
@@ -115,7 +115,6 @@ typedef struct MOS6522State {
uint8_t pcr;
uint8_t ifr;
uint8_t ier;
- uint8_t anh;
MOS6522Timer timers[2];
uint64_t frequency;
--
2.24.1
- [PULL 00/26] ppc-for-5.0 queue 20200108, David Gibson, 2020/01/08
- [PULL 05/26] ppc/pnv: Modify the powerdown notifier to get the PowerNV machine, David Gibson, 2020/01/08
- [PULL 04/26] ppc/spapr: Support reboot of secure pseries guest, David Gibson, 2020/01/08
- [PULL 02/26] target/ppc: Handle AIL=0 in ppc_excp_vector_offset, David Gibson, 2020/01/08
- [PULL 09/26] spapr.c: remove 'out' label in spapr_dt_cas_updates(), David Gibson, 2020/01/08
- [PULL 10/26] ppc440_bamboo.c: remove label from bamboo_load_device_tree(), David Gibson, 2020/01/08
- [PULL 01/26] target/ppc: Remove unused PPC_INPUT_INT defines, David Gibson, 2020/01/08
- [PULL 06/26] mos6522: remove anh register,
David Gibson <=
- [PULL 08/26] ppc/spapr: Don't call KVM_SVM_OFF ioctl on TCG, David Gibson, 2020/01/08
- [PULL 03/26] linux-headers: Update, David Gibson, 2020/01/08
- [PULL 18/26] ppc/pnv: Add an "nr-threads" property to the base chip class, David Gibson, 2020/01/08
- [PULL 07/26] spapr/xive: Use device_class_set_parent_realize(), David Gibson, 2020/01/08
- [PULL 25/26] ppc/pnv: check return value of blk_pwrite(), David Gibson, 2020/01/08
- [PULL 15/26] pnv/xive: Use device_class_set_parent_realize(), David Gibson, 2020/01/08
- [PULL 22/26] pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr, David Gibson, 2020/01/08
- [PULL 21/26] spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr, David Gibson, 2020/01/08
- [PULL 19/26] ppc/pnv: Add a "pnor" const link property to the BMC internal simulator, David Gibson, 2020/01/08
- [PULL 11/26] ppc/pnv: Drop "num-chips" machine property, David Gibson, 2020/01/08