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Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits
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Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits |
Date: |
Fri, 27 Sep 2019 13:44:25 -0700 (PDT) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [PATCH V2] intel_iommu: TM field should not be in reserved bits
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Switched to a new branch 'test'
4cd505b intel_iommu: TM field should not be in reserved bits
=== OUTPUT BEGIN ===
ERROR: line over 90 characters
#26: FILE: hw/i386/intel_iommu.c:3551:
+ vtd_paging_entry_rsvd_field[1] = VTD_SPTE_PAGE_L1_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: line over 90 characters
#27: FILE: hw/i386/intel_iommu.c:3552:
+ vtd_paging_entry_rsvd_field[2] = VTD_SPTE_PAGE_L2_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: line over 90 characters
#28: FILE: hw/i386/intel_iommu.c:3553:
+ vtd_paging_entry_rsvd_field[3] = VTD_SPTE_PAGE_L3_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: line over 90 characters
#33: FILE: hw/i386/intel_iommu.c:3555:
+ vtd_paging_entry_rsvd_field[5] = VTD_SPTE_LPAGE_L1_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: line over 90 characters
#34: FILE: hw/i386/intel_iommu.c:3556:
+ vtd_paging_entry_rsvd_field[6] = VTD_SPTE_LPAGE_L2_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: line over 90 characters
#35: FILE: hw/i386/intel_iommu.c:3557:
+ vtd_paging_entry_rsvd_field[7] = VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_bits,
x86_iommu->dt_supported);
ERROR: spaces required around that '?' (ctx:VxE)
#49: FILE: hw/i386/intel_iommu_internal.h:391:
+ dt_supported? \
^
ERROR: spaces required around that '?' (ctx:VxE)
#54: FILE: hw/i386/intel_iommu_internal.h:395:
+ dt_supported? \
^
ERROR: spaces required around that '?' (ctx:VxE)
#59: FILE: hw/i386/intel_iommu_internal.h:399:
+ dt_supported? \
^
ERROR: spaces required around that '?' (ctx:VxE)
#66: FILE: hw/i386/intel_iommu_internal.h:405:
+ dt_supported? \
^
ERROR: spaces required around that '?' (ctx:VxE)
#71: FILE: hw/i386/intel_iommu_internal.h:409:
+ dt_supported? \
^
ERROR: spaces required around that '?' (ctx:VxE)
#76: FILE: hw/i386/intel_iommu_internal.h:413:
+ dt_supported? \
^
total: 12 errors, 0 warnings, 62 lines checked
Commit 4cd505b83cac (intel_iommu: TM field should not be in reserved bits) has
style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
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- [PATCH V2] intel_iommu: TM field should not be in reserved bits, qi1 . zhang, 2019/09/27
- Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Peter Xu, 2019/09/27
- RE: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Zhang, Qi1, 2019/09/27
- Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Peter Xu, 2019/09/27
- RE: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Zhang, Qi1, 2019/09/28
- Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Peter Xu, 2019/09/28
- RE: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Zhang, Qi1, 2019/09/28
- Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Peter Xu, 2019/09/28
Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits, Michael S. Tsirkin, 2019/09/27
Re: [PATCH V2] intel_iommu: TM field should not be in reserved bits,
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