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[PULL 3/9] target/arm: handle M-profile semihosting at translate time
From: |
Peter Maydell |
Subject: |
[PULL 3/9] target/arm: handle M-profile semihosting at translate time |
Date: |
Fri, 27 Sep 2019 15:42:43 +0100 |
From: Alex Bennée <address@hidden>
We do this for other semihosting calls so we might as well do it for
M-profile as well.
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/m_helper.c | 18 ++++++------------
target/arm/translate.c | 11 ++++++++++-
2 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 884d35d2b02..27cd2f3f964 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -2114,19 +2114,13 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
break;
}
break;
+ case EXCP_SEMIHOST:
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%x\n",
+ env->regs[0]);
+ env->regs[0] = do_arm_semihosting(env);
+ return;
case EXCP_BKPT:
- if (semihosting_enabled()) {
- int nr;
- nr = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env)) & 0xff;
- if (nr == 0xab) {
- env->regs[15] += 2;
- qemu_log_mask(CPU_LOG_INT,
- "...handling as semihosting call 0x%x\n",
- env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
- return;
- }
- }
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false);
break;
case EXCP_IRQ:
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 34bb280e3da..b5272119330 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8424,7 +8424,16 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)
if (!ENABLE_ARCH_5) {
return false;
}
- gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false));
+ if (arm_dc_feature(s, ARM_FEATURE_M) &&
+ semihosting_enabled() &&
+#ifndef CONFIG_USER_ONLY
+ !IS_USER(s) &&
+#endif
+ (a->imm == 0xab)) {
+ gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
+ } else {
+ gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false));
+ }
return true;
}
--
2.20.1
- [PULL 0/9] target-arm queue, Peter Maydell, 2019/09/27
- [PULL 2/9] tests/tcg: clean-up some comments after the de-tangling, Peter Maydell, 2019/09/27
- [PULL 3/9] target/arm: handle M-profile semihosting at translate time,
Peter Maydell <=
- [PULL 4/9] target/arm: handle A-profile semihosting at translate time, Peter Maydell, 2019/09/27
- [PULL 9/9] hw/arm/boot: Use the IEC binary prefix definitions, Peter Maydell, 2019/09/27
- [PULL 1/9] target/arm: fix CBAR register for AArch64 CPUs, Peter Maydell, 2019/09/27
- [PULL 7/9] tests/tcg: add linux-user semihosting smoke test for ARM, Peter Maydell, 2019/09/27
- [PULL 8/9] hw/arm/boot.c: Set NSACR.{CP11,CP10} for NS kernel boots, Peter Maydell, 2019/09/27
- [PULL 5/9] target/arm: remove run time semihosting checks, Peter Maydell, 2019/09/27
- [PULL 6/9] target/arm: remove run-time semihosting checks for linux-user, Peter Maydell, 2019/09/27
- Re: [PULL 0/9] target-arm queue, Peter Maydell, 2019/09/30