[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH] i386: Add CPUID bit for CLZERO and XSAVEERPTR
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH] i386: Add CPUID bit for CLZERO and XSAVEERPTR |
Date: |
Thu, 26 Sep 2019 13:06:34 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 25/09/19 23:49, Sebastian Andrzej Siewior wrote:
> #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass
> Disable */
>
> +#define CPUD_800_008_EBX_CLZERO (1U << 0) /* CLZERO instruction
> */
> +#define CPUD_800_008_EBX_XSAVEERPTR (1U << 2) /* Always save/restore FP
> error pointers */
> #define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Write back and
Well, there are obvious typos here but I can fix them for you.
Which processors have these?
Paolo