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From: | Richard Henderson |
Subject: | Re: [PATCH v2 10/16] tests/tcg: add generic version of float_convs |
Date: | Fri, 20 Sep 2019 15:09:40 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 9/20/19 3:15 AM, Alex Bennée wrote: > I can't figure out what is meant to be going on with CONVERT_BITS. It > seems to be implying there is a direct relationship between status flags > and the exception disable bits. But that is confusing because integer > overflow (IOV) and float overflow (OVF) are different flags bit I assume > both suppressed by Overflow Disable (OVFD). I had failed to notice that the kernel routine plays with INV and not IOV for the emulation of CVTTQ, so it's the SWCR_TRAP_ENABLE_INV bit that controls whether CVTTQ/S raises a signal. Will fix. > Why are we doing this magic 32 bit shuffling anyway? Is it purely to > save 32 bits of a mostly empty lower half of the FPCR register? Yes. Which is not a great answer, but it was done years ago and there's little point in changing it back now. r~
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