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Re: [Qemu-devel] [PATCH v2 08/17] RISC-V: add vector extension integer i
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v2 08/17] RISC-V: add vector extension integer instructions part1, add/sub/adc/sbc |
Date: |
Thu, 12 Sep 2019 11:35:40 -0400 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 9/12/19 11:27 AM, Richard Henderson wrote:
>> +void VECTOR_HELPER(vadc_vxm)(CPURISCVState *env, uint32_t rs1,
>> + uint32_t rs2, uint32_t rd)
>> +{
>
> Watch the spacing between functions.
> Pass gpr rs1 by value.
>
>> +void VECTOR_HELPER(vadc_vim)(CPURISCVState *env, uint32_t rs1,
>> + uint32_t rs2, uint32_t rd)
>> +{
> ...
>> + env->vfp.vreg[dest].u8[j] = sign_extend(rs1, 5)
>
> Pass the immediate as a sign-extended immediate to begin with, not as an
> unsigned 5-bit field.
Oh, and of course *_vxm and *_vim should be identical, because in both cases
there is a single scalar parameter. In the first case the scalar is passed by
value from the gpr; in the second case the scalar is the sign-extended constant.
r~
- Re: [Qemu-devel] [PATCH v2 06/17] RISC-V: add vector extension fault-only-first implementation, (continued)
- [Qemu-devel] [PATCH v2 07/17] RISC-V: add vector extension atomic instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 09/17] RISC-V: add vector extension integer instructions part2, bit/shift, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 05/17] RISC-V: add vector extension load and store instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 10/17] RISC-V: add vector extension integer instructions part3, cmp/min/max, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 08/17] RISC-V: add vector extension integer instructions part1, add/sub/adc/sbc, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 16/17] RISC-V: add vector extension mask instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 17/17] RISC-V: add vector extension premutation instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 15/17] RISC-V: add vector extension reduction instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 12/17] RISC-V: add vector extension fixed point instructions, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 13/17] RISC-V: add vector extension float instruction part1, add/sub/mul/div, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 14/17] RISC-V: add vector extension float instructions part2, sqrt/cmp/cvt/others, liuzhiwei, 2019/09/11
- [Qemu-devel] [PATCH v2 11/17] RISC-V: add vector extension integer instructions part4, mul/div/merge, liuzhiwei, 2019/09/11