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[Qemu-devel] [RFC 2 PATCH 11/16] Introduce-topo_ids_from_apicid-handler
From: |
Moger, Babu |
Subject: |
[Qemu-devel] [RFC 2 PATCH 11/16] Introduce-topo_ids_from_apicid-handler |
Date: |
Fri, 6 Sep 2019 19:12:55 +0000 |
hw/i386: Introduce topo_ids_from_apicid handler PCMachineState
Add function pointer topo_ids_from_apicid in PCMachineState.
Initialize with correct handler based on mode selected.
x86_apicid_from_cpu_idx will be the default handler.
Signed-off-by: Babu Moger <address@hidden>
---
hw/i386/pc.c | 13 +++++++------
include/hw/i386/pc.h | 2 ++
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 69a6b82186..c88de09350 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -2461,7 +2461,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
if (!cpu_slot) {
MachineState *ms = MACHINE(pcms);
- x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
error_setg(errp,
"Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
" APIC ID %" PRIu32 ", valid index range 0:%d",
@@ -2482,7 +2482,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
/* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
* once -smp refactoring is complete and there will be CPU private
* CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
- x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
" 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
topo_ids.pkg_id);
@@ -2830,6 +2830,7 @@ static void pc_machine_initfn(Object *obj)
/* Initialize the apic id related handlers */
pcms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx;
+ pcms->topo_ids_from_apicid = x86_topo_ids_from_apicid;
pc_system_flash_create(pcms);
}
@@ -2872,8 +2873,8 @@ static int64_t pc_get_default_cpu_node_id(const
MachineState *ms, int idx)
initialize_topo_info(&topo_info, pcms, ms);
assert(idx < ms->possible_cpus->len);
- x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
- &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
+ &topo_info, &topo_ids);
return topo_ids.pkg_id % nb_numa_nodes;
}
@@ -2906,8 +2907,8 @@ static const CPUArchIdList
*pc_possible_cpu_arch_ids(MachineState *ms)
ms->possible_cpus->cpus[i].type = ms->cpu_type;
ms->possible_cpus->cpus[i].vcpus_count = 1;
ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(pcms,
i);
- x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
- &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
+ &topo_info, &topo_ids);
ms->possible_cpus->cpus[i].props.has_socket_id = true;
ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
ms->possible_cpus->cpus[i].props.has_die_id = true;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6cefefdd57..9a40f123d0 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -69,6 +69,8 @@ struct PCMachineState {
/* Apic id specific handlers */
uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info, unsigned
cpu_index);
+ void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info,
+ X86CPUTopoIDs *topo_ids);
/* Address space used by IOAPIC device. All IOAPIC interrupts
* will be translated to MSI messages in the address space. */
- [Qemu-devel] [RFC 2 PATCH 05/16] hw/i386: Simplify topology Offset/width Calculation, (continued)
- [Qemu-devel] [RFC 2 PATCH 05/16] hw/i386: Simplify topology Offset/width Calculation, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 06/16] hw/core: Add core complex id in X86CPU topology, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 07/16] hw/386: Add new epyc mode topology decoding functions, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 08/16] i386: Cleanup and use the new epyc mode topology functions, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 09/16] hw/i386: Introduce initialize_topo_info function, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 10/16] hw/i386: Introduce apicid_from_cpu_idx in PCMachineState, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 11/16] Introduce-topo_ids_from_apicid-handler,
Moger, Babu <=
- [Qemu-devel] [RFC 2 PATCH 12/16] hw/i386: Introduce apic_id_from_topo_ids handler in PCMachineState, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 13/16] machine: Add new epyc property in PCMachineState, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 14/16] hw/i386: Introduce epyc mode function handlers, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 15/16] i386: Fix pkg_id offset for epyc mode, Moger, Babu, 2019/09/06
- [Qemu-devel] [RFC 2 PATCH 16/16] hw/core: Fix up the machine_set_cpu_numa_node for epyc, Moger, Babu, 2019/09/06
- Re: [RFC 2 PATCH 00/16] APIC ID fixes for AMD EPYC CPU models, Moger, Babu, 2019/09/20