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[Qemu-devel] [RFC PATCH 04/15] aspeed/timer: Add support for AST2600
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [RFC PATCH 04/15] aspeed/timer: Add support for AST2600 |
Date: |
Wed, 4 Sep 2019 22:46:48 +0200 |
The AST2600 timer has a third control register that is used to
implement a set-to-clear feature for the main control register.
On the AST2600, it is not configurable via 0x38 (control register 3)
as it is on the AST2500.
Based on previous work from Joel Stanley.
Signed-off-by: Cédric Le Goater <address@hidden>
---
include/hw/timer/aspeed_timer.h | 1 +
hw/timer/aspeed_timer.c | 51 +++++++++++++++++++++++++++++++++
2 files changed, 52 insertions(+)
diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h
index 1e0288ebc49f..69b1377af01e 100644
--- a/include/hw/timer/aspeed_timer.h
+++ b/include/hw/timer/aspeed_timer.h
@@ -30,6 +30,7 @@
#define TYPE_ASPEED_TIMER "aspeed.timer"
#define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400"
#define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500"
+#define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600"
#define ASPEED_TIMER_NR_TIMERS 8
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index d70e78a0293e..7f73d0c75337 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -538,6 +538,40 @@ static void aspeed_2500_timer_write(AspeedTimerCtrlState
*s, hwaddr offset,
}
}
+static uint64_t aspeed_2600_timer_read(AspeedTimerCtrlState *s, hwaddr offset)
+{
+ uint64_t value;
+
+ switch (offset) {
+ case 0x38:
+ case 0x3C:
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+ value = 0;
+ break;
+ }
+ return value;
+}
+
+static void aspeed_2600_timer_write(AspeedTimerCtrlState *s, hwaddr offset,
+ uint64_t value)
+{
+ const uint32_t tv = (uint32_t)(value & 0xFFFFFFFF);
+
+ switch (offset) {
+ case 0x3C:
+ aspeed_timer_set_ctrl(s, s->ctrl & ~tv);
+ break;
+
+ case 0x38:
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+ break;
+ }
+}
+
static void aspeed_init_one_timer(AspeedTimerCtrlState *s, uint8_t id)
{
AspeedTimer *t = &s->timers[id];
@@ -674,11 +708,28 @@ static const TypeInfo aspeed_2500_timer_info = {
.class_init = aspeed_2500_timer_class_init,
};
+static void aspeed_2600_timer_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ AspeedTimerClass *awc = ASPEED_TIMER_CLASS(klass);
+
+ dc->desc = "ASPEED 2600 Timer";
+ awc->read = aspeed_2600_timer_read;
+ awc->write = aspeed_2600_timer_write;
+}
+
+static const TypeInfo aspeed_2600_timer_info = {
+ .name = TYPE_ASPEED_2600_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_2600_timer_class_init,
+};
+
static void aspeed_timer_register_types(void)
{
type_register_static(&aspeed_timer_info);
type_register_static(&aspeed_2400_timer_info);
type_register_static(&aspeed_2500_timer_info);
+ type_register_static(&aspeed_2600_timer_info);
}
type_init(aspeed_timer_register_types)
--
2.21.0
- [Qemu-devel] [RFC PATCH 00/15] aspeed: Add support for the AST2600 SoC, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 01/15] hw: aspeed_scu: Add AST2600 support, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 02/15] aspeed/timer: Introduce an object class per SoC, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 03/15] aspeed/timer: Add support for control register 3, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 04/15] aspeed/timer: Add support for AST2600,
Cédric Le Goater <=
- [Qemu-devel] [RFC PATCH 05/15] aspeed/timer: Add support for IRQ status register on the AST2600, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 06/15] aspeed/sdmc: Introduce an object class per SoC, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 07/15] aspeed/sdmc: Add AST2600 support, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 08/15] watchdog/aspeed: Introduce an object class per SoC, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 09/15] hw: wdt_aspeed: Add AST2600 support, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 10/15] aspeed/smc: Add support for the AST2600 SoC, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 11/15] hw/gpio: Add in AST2600 specific implementation, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 12/15] aspeed: add support for the AST2600 eval board, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 13/15] aspeed: Parameterise number of MACs, Cédric Le Goater, 2019/09/04
- [Qemu-devel] [RFC PATCH 14/15] aspeed: add support for the Aspeed MII controller of the AST2600, Cédric Le Goater, 2019/09/04