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[Qemu-devel] [PULL 11/21] hw/arm: Use object_initialize_child for correc
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/21] hw/arm: Use object_initialize_child for correct reference counting |
Date: |
Tue, 3 Sep 2019 16:36:23 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
As explained in commit aff39be0ed97:
Both functions, object_initialize() and object_property_add_child()
increase the reference counter of the new object, so one of the
references has to be dropped afterwards to get the reference
counting right. Otherwise the child object will not be properly
cleaned up when the parent gets destroyed.
Thus let's use now object_initialize_child() instead to get the
reference counting here right.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/mcimx7d-sabre.c | 9 ++++-----
hw/arm/mps2-tz.c | 15 +++++++--------
hw/arm/musca.c | 9 +++++----
3 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 97b8bb788a1..78b87c502fc 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -30,7 +30,6 @@ static void mcimx7d_sabre_init(MachineState *machine)
{
static struct arm_boot_info boot_info;
MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1);
- Object *soc;
int i;
if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
@@ -49,10 +48,10 @@ static void mcimx7d_sabre_init(MachineState *machine)
.nb_cpus = machine->smp.cpus,
};
- object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
- soc = OBJECT(&s->soc);
- object_property_add_child(OBJECT(machine), "soc", soc, &error_fatal);
- object_property_set_bool(soc, true, "realized", &error_fatal);
+ object_initialize_child(OBJECT(machine), "soc",
+ &s->soc, sizeof(s->soc),
+ TYPE_FSL_IMX7, &error_fatal, NULL);
+ object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram",
machine->ram_size);
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index d85dc2c4bd8..6b24aaacded 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -427,10 +427,10 @@ static void mps2tz_common_init(MachineState *machine)
/* The sec_resp_cfg output from the IoTKit must be split into multiple
* lines, one for each of the PPCs we create here, plus one per MSC.
*/
- object_initialize(&mms->sec_resp_splitter, sizeof(mms->sec_resp_splitter),
- TYPE_SPLIT_IRQ);
- object_property_add_child(OBJECT(machine), "sec-resp-splitter",
- OBJECT(&mms->sec_resp_splitter), &error_abort);
+ object_initialize_child(OBJECT(machine), "sec-resp-splitter",
+ &mms->sec_resp_splitter,
+ sizeof(mms->sec_resp_splitter),
+ TYPE_SPLIT_IRQ, &error_abort, NULL);
object_property_set_int(OBJECT(&mms->sec_resp_splitter),
ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc),
"num-lines", &error_fatal);
@@ -465,10 +465,9 @@ static void mps2tz_common_init(MachineState *machine)
* Tx, Rx and "combined" IRQs are sent to the NVIC separately.
* Create the OR gate for this.
*/
- object_initialize(&mms->uart_irq_orgate, sizeof(mms->uart_irq_orgate),
- TYPE_OR_IRQ);
- object_property_add_child(OBJECT(mms), "uart-irq-orgate",
- OBJECT(&mms->uart_irq_orgate), &error_abort);
+ object_initialize_child(OBJECT(mms), "uart-irq-orgate",
+ &mms->uart_irq_orgate,
sizeof(mms->uart_irq_orgate),
+ TYPE_OR_IRQ, &error_abort, NULL);
object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines",
&error_fatal);
object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true,
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index ddd8842732c..68db4b5b387 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -424,10 +424,11 @@ static void musca_init(MachineState *machine)
* The sec_resp_cfg output from the SSE-200 must be split into multiple
* lines, one for each of the PPCs we create here.
*/
- object_initialize(&mms->sec_resp_splitter, sizeof(mms->sec_resp_splitter),
- TYPE_SPLIT_IRQ);
- object_property_add_child(OBJECT(machine), "sec-resp-splitter",
- OBJECT(&mms->sec_resp_splitter), &error_fatal);
+ object_initialize_child(OBJECT(machine), "sec-resp-splitter",
+ &mms->sec_resp_splitter,
+ sizeof(mms->sec_resp_splitter),
+ TYPE_SPLIT_IRQ, &error_fatal, NULL);
+
object_property_set_int(OBJECT(&mms->sec_resp_splitter),
ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal);
object_property_set_bool(OBJECT(&mms->sec_resp_splitter), true,
--
2.20.1
- [Qemu-devel] [PULL 03/21] target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions, (continued)
- [Qemu-devel] [PULL 03/21] target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 05/21] aspeed/timer: Provide back-pressure information for short periods, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 06/21] memory: Remove unused memory_region_iommu_replay_all(), Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 08/21] hw/arm/smmuv3: Remove spurious error messages on IOVA invalidations, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 04/21] target/arm: Take exceptions on ATS instructions when needed, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 07/21] hw/arm/smmuv3: Log a guest error when decoding an invalid STE, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 09/21] target/arm: Fix SMMLS argument order, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 10/21] hw/arm: Use ARM_CPU_TYPE_NAME() macro when appropriate, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 12/21] hw/arm: Use sysbus_init_child_obj for correct reference counting, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 11/21] hw/arm: Use object_initialize_child for correct reference counting,
Peter Maydell <=
- [Qemu-devel] [PULL 13/21] hw/arm/fsl-imx: Add the cpu as child of the SoC object, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 14/21] hw/dma/xilinx_axi: Use object_initialize_child for correct ref. counting, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 15/21] hw/net/xilinx_axi: Use object_initialize_child for correct ref. counting, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 20/21] target/arm: Free TCG temps in trans_VMOV_64_sp(), Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 16/21] includes: remove stale [smp|max]_cpus externs, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 17/21] tcg/README: fix typo s/afterwise/afterwards/, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 18/21] atomic_template: fix indentation in GEN_ATOMIC_HELPER, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 19/21] include/exec/cpu-defs.h: fix typo, Peter Maydell, 2019/09/03
- [Qemu-devel] [PULL 21/21] target/arm: Don't abort on M-profile exception return in linux-user mode, Peter Maydell, 2019/09/03
- Re: [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2019/09/04