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Re: [Qemu-devel] [PATCH] spapr/pci: Convert types to QEMU coding style
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From: |
David Gibson |
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Subject: |
Re: [Qemu-devel] [PATCH] spapr/pci: Convert types to QEMU coding style |
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Date: |
Thu, 29 Aug 2019 09:29:20 +1000 |
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User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Wed, Aug 28, 2019 at 08:20:44PM +0200, Greg Kurz wrote:
> The QEMU coding style requires:
> - to typedef structured types (HACKING)
> - to use CamelCase for types and structure names (CODING_STYLE)
>
> Do that for PCI and Nvlink2 code.
>
> Signed-off-by: Greg Kurz <address@hidden>
Applied, thanks.
> ---
> hw/ppc/spapr_pci.c | 28 ++++++++++++++--------------
> hw/ppc/spapr_pci_nvlink2.c | 40 +++++++++++++++++++++-------------------
> include/hw/pci-host/spapr.h | 24 ++++++++++++++----------
> 3 files changed, 49 insertions(+), 43 deletions(-)
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 9f176f463e76..a777fb3e7ff6 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -280,7 +280,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
> unsigned int irq, max_irqs = 0;
> SpaprPhbState *phb = NULL;
> PCIDevice *pdev = NULL;
> - spapr_pci_msi *msi;
> + SpaprPciMsi *msi;
> int *config_addr_key;
> Error *err = NULL;
> int i;
> @@ -328,7 +328,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
> return;
> }
>
> - msi = (spapr_pci_msi *) g_hash_table_lookup(phb->msi, &config_addr);
> + msi = (SpaprPciMsi *) g_hash_table_lookup(phb->msi, &config_addr);
>
> /* Releasing MSIs */
> if (!req_num) {
> @@ -415,7 +415,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
> irq, req_num);
>
> /* Add MSI device to cache */
> - msi = g_new(spapr_pci_msi, 1);
> + msi = g_new(SpaprPciMsi, 1);
> msi->first_irq = irq;
> msi->num = req_num;
> config_addr_key = g_new(int, 1);
> @@ -446,7 +446,7 @@ static void
> rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
> unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3);
> SpaprPhbState *phb = NULL;
> PCIDevice *pdev = NULL;
> - spapr_pci_msi *msi;
> + SpaprPciMsi *msi;
>
> /* Find SpaprPhbState */
> phb = spapr_pci_find_phb(spapr, buid);
> @@ -459,7 +459,7 @@ static void
> rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
> }
>
> /* Find device descriptor and start IRQ */
> - msi = (spapr_pci_msi *) g_hash_table_lookup(phb->msi, &config_addr);
> + msi = (SpaprPciMsi *) g_hash_table_lookup(phb->msi, &config_addr);
> if (!msi || !msi->first_irq || !msi->num || (ioa_intr_num >= msi->num)) {
> trace_spapr_pci_msi("Failed to return vector", config_addr);
> rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
> @@ -1806,7 +1806,7 @@ static void spapr_phb_destroy_msi(gpointer opaque)
> {
> SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
> SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
> - spapr_pci_msi *msi = opaque;
> + SpaprPciMsi *msi = opaque;
>
> if (!smc->legacy_irq_allocation) {
> spapr_irq_msi_free(spapr, msi->first_irq, msi->num);
> @@ -2120,7 +2120,7 @@ static const VMStateDescription vmstate_spapr_pci_lsi =
> {
> .version_id = 1,
> .minimum_version_id = 1,
> .fields = (VMStateField[]) {
> - VMSTATE_UINT32_EQUAL(irq, struct spapr_pci_lsi, NULL),
> + VMSTATE_UINT32_EQUAL(irq, SpaprPciLsi, NULL),
>
> VMSTATE_END_OF_LIST()
> },
> @@ -2131,9 +2131,9 @@ static const VMStateDescription vmstate_spapr_pci_msi =
> {
> .version_id = 1,
> .minimum_version_id = 1,
> .fields = (VMStateField []) {
> - VMSTATE_UINT32(key, spapr_pci_msi_mig),
> - VMSTATE_UINT32(value.first_irq, spapr_pci_msi_mig),
> - VMSTATE_UINT32(value.num, spapr_pci_msi_mig),
> + VMSTATE_UINT32(key, SpaprPciMsiMig),
> + VMSTATE_UINT32(value.first_irq, SpaprPciMsiMig),
> + VMSTATE_UINT32(value.num, SpaprPciMsiMig),
> VMSTATE_END_OF_LIST()
> },
> };
> @@ -2165,12 +2165,12 @@ static int spapr_pci_pre_save(void *opaque)
> if (!sphb->msi_devs_num) {
> return 0;
> }
> - sphb->msi_devs = g_new(spapr_pci_msi_mig, sphb->msi_devs_num);
> + sphb->msi_devs = g_new(SpaprPciMsiMig, sphb->msi_devs_num);
>
> g_hash_table_iter_init(&iter, sphb->msi);
> for (i = 0; g_hash_table_iter_next(&iter, &key, &value); ++i) {
> sphb->msi_devs[i].key = *(uint32_t *) key;
> - sphb->msi_devs[i].value = *(spapr_pci_msi *) value;
> + sphb->msi_devs[i].value = *(SpaprPciMsi *) value;
> }
>
> return 0;
> @@ -2217,10 +2217,10 @@ static const VMStateDescription vmstate_spapr_pci = {
> VMSTATE_UINT64_TEST(mig_io_win_addr, SpaprPhbState,
> pre_2_8_migration),
> VMSTATE_UINT64_TEST(mig_io_win_size, SpaprPhbState,
> pre_2_8_migration),
> VMSTATE_STRUCT_ARRAY(lsi_table, SpaprPhbState, PCI_NUM_PINS, 0,
> - vmstate_spapr_pci_lsi, struct spapr_pci_lsi),
> + vmstate_spapr_pci_lsi, SpaprPciLsi),
> VMSTATE_INT32(msi_devs_num, SpaprPhbState),
> VMSTATE_STRUCT_VARRAY_ALLOC(msi_devs, SpaprPhbState, msi_devs_num, 0,
> - vmstate_spapr_pci_msi,
> spapr_pci_msi_mig),
> + vmstate_spapr_pci_msi, SpaprPciMsiMig),
> VMSTATE_END_OF_LIST()
> },
> };
> diff --git a/hw/ppc/spapr_pci_nvlink2.c b/hw/ppc/spapr_pci_nvlink2.c
> index eda8c752aa22..4aa89ede23e6 100644
> --- a/hw/ppc/spapr_pci_nvlink2.c
> +++ b/hw/ppc/spapr_pci_nvlink2.c
> @@ -39,11 +39,7 @@
>
> #define SPAPR_GPU_NUMA_ID (cpu_to_be32(1))
>
> -struct spapr_phb_pci_nvgpu_config {
> - uint64_t nv2_ram_current;
> - uint64_t nv2_atsd_current;
> - int num; /* number of non empty (i.e. tgt!=0) entries in slots[] */
> - struct spapr_phb_pci_nvgpu_slot {
> +typedef struct SpaprPhbPciNvGpuSlot {
> uint64_t tgt;
> uint64_t gpa;
> unsigned numa_id;
> @@ -54,12 +50,18 @@ struct spapr_phb_pci_nvgpu_config {
> PCIDevice *npdev;
> uint32_t link_speed;
> } links[NVGPU_MAX_LINKS];
> - } slots[NVGPU_MAX_NUM];
> +} SpaprPhbPciNvGpuSlot;
> +
> +struct SpaprPhbPciNvGpuConfig {
> + uint64_t nv2_ram_current;
> + uint64_t nv2_atsd_current;
> + int num; /* number of non empty (i.e. tgt!=0) entries in slots[] */
> + SpaprPhbPciNvGpuSlot slots[NVGPU_MAX_NUM];
> Error *errp;
> };
>
> -static struct spapr_phb_pci_nvgpu_slot *
> -spapr_nvgpu_get_slot(struct spapr_phb_pci_nvgpu_config *nvgpus, uint64_t tgt)
> +static SpaprPhbPciNvGpuSlot *
> +spapr_nvgpu_get_slot(SpaprPhbPciNvGpuConfig *nvgpus, uint64_t tgt)
> {
> int i;
>
> @@ -81,13 +83,13 @@ spapr_nvgpu_get_slot(struct spapr_phb_pci_nvgpu_config
> *nvgpus, uint64_t tgt)
> return &nvgpus->slots[i];
> }
>
> -static void spapr_pci_collect_nvgpu(struct spapr_phb_pci_nvgpu_config
> *nvgpus,
> +static void spapr_pci_collect_nvgpu(SpaprPhbPciNvGpuConfig *nvgpus,
> PCIDevice *pdev, uint64_t tgt,
> MemoryRegion *mr, Error **errp)
> {
> MachineState *machine = MACHINE(qdev_get_machine());
> SpaprMachineState *spapr = SPAPR_MACHINE(machine);
> - struct spapr_phb_pci_nvgpu_slot *nvslot = spapr_nvgpu_get_slot(nvgpus,
> tgt);
> + SpaprPhbPciNvGpuSlot *nvslot = spapr_nvgpu_get_slot(nvgpus, tgt);
>
> if (!nvslot) {
> error_setg(errp, "Found too many GPUs per vPHB");
> @@ -102,11 +104,11 @@ static void spapr_pci_collect_nvgpu(struct
> spapr_phb_pci_nvgpu_config *nvgpus,
> ++spapr->gpu_numa_id;
> }
>
> -static void spapr_pci_collect_nvnpu(struct spapr_phb_pci_nvgpu_config
> *nvgpus,
> +static void spapr_pci_collect_nvnpu(SpaprPhbPciNvGpuConfig *nvgpus,
> PCIDevice *pdev, uint64_t tgt,
> MemoryRegion *mr, Error **errp)
> {
> - struct spapr_phb_pci_nvgpu_slot *nvslot = spapr_nvgpu_get_slot(nvgpus,
> tgt);
> + SpaprPhbPciNvGpuSlot *nvslot = spapr_nvgpu_get_slot(nvgpus, tgt);
> int j;
>
> if (!nvslot) {
> @@ -138,7 +140,7 @@ static void spapr_phb_pci_collect_nvgpu(PCIBus *bus,
> PCIDevice *pdev,
>
> if (tgt) {
> Error *local_err = NULL;
> - struct spapr_phb_pci_nvgpu_config *nvgpus = opaque;
> + SpaprPhbPciNvGpuConfig *nvgpus = opaque;
> Object *mr_gpu = object_property_get_link(po, "nvlink2-mr[0]", NULL);
> Object *mr_npu = object_property_get_link(po, "nvlink2-atsd-mr[0]",
> NULL);
> @@ -177,7 +179,7 @@ void spapr_phb_nvgpu_setup(SpaprPhbState *sphb, Error
> **errp)
> return;
> }
>
> - sphb->nvgpus = g_new0(struct spapr_phb_pci_nvgpu_config, 1);
> + sphb->nvgpus = g_new0(SpaprPhbPciNvGpuConfig, 1);
> sphb->nvgpus->nv2_ram_current = sphb->nv2_gpa_win_addr;
> sphb->nvgpus->nv2_atsd_current = sphb->nv2_atsd_win_addr;
>
> @@ -194,7 +196,7 @@ void spapr_phb_nvgpu_setup(SpaprPhbState *sphb, Error
> **errp)
> /* Add found GPU RAM and ATSD MRs if found */
> for (i = 0, valid_gpu_num = 0; i < sphb->nvgpus->num; ++i) {
> Object *nvmrobj;
> - struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i];
> + SpaprPhbPciNvGpuSlot *nvslot = &sphb->nvgpus->slots[i];
>
> if (!nvslot->gpdev) {
> continue;
> @@ -242,7 +244,7 @@ void spapr_phb_nvgpu_free(SpaprPhbState *sphb)
> }
>
> for (i = 0; i < sphb->nvgpus->num; ++i) {
> - struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i];
> + SpaprPhbPciNvGpuSlot *nvslot = &sphb->nvgpus->slots[i];
> Object *nv_mrobj = object_property_get_link(OBJECT(nvslot->gpdev),
> "nvlink2-mr[0]", NULL);
>
> @@ -276,7 +278,7 @@ void spapr_phb_nvgpu_populate_dt(SpaprPhbState *sphb,
> void *fdt, int bus_off,
> }
>
> for (i = 0; (i < sphb->nvgpus->num) && (atsdnum < ARRAY_SIZE(atsd));
> ++i) {
> - struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i];
> + SpaprPhbPciNvGpuSlot *nvslot = &sphb->nvgpus->slots[i];
>
> if (!nvslot->gpdev) {
> continue;
> @@ -354,7 +356,7 @@ void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb,
> void *fdt)
>
> /* Add memory nodes for GPU RAM and mark them unusable */
> for (i = 0; i < sphb->nvgpus->num; ++i) {
> - struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i];
> + SpaprPhbPciNvGpuSlot *nvslot = &sphb->nvgpus->slots[i];
> Object *nv_mrobj = object_property_get_link(OBJECT(nvslot->gpdev),
> "nvlink2-mr[0]", NULL);
> uint32_t associativity[] = {
> @@ -398,7 +400,7 @@ void spapr_phb_nvgpu_populate_pcidev_dt(PCIDevice *dev,
> void *fdt, int offset,
> }
>
> for (i = 0; i < sphb->nvgpus->num; ++i) {
> - struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i];
> + SpaprPhbPciNvGpuSlot *nvslot = &sphb->nvgpus->slots[i];
>
> /* Skip "slot" without attached GPU */
> if (!nvslot->gpdev) {
> diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h
> index 1b61162f918e..abd87605b270 100644
> --- a/include/hw/pci-host/spapr.h
> +++ b/include/hw/pci-host/spapr.h
> @@ -34,15 +34,21 @@
>
> typedef struct SpaprPhbState SpaprPhbState;
>
> -typedef struct spapr_pci_msi {
> +typedef struct SpaprPciMsi {
> uint32_t first_irq;
> uint32_t num;
> -} spapr_pci_msi;
> +} SpaprPciMsi;
>
> -typedef struct spapr_pci_msi_mig {
> +typedef struct SpaprPciMsiMig {
> uint32_t key;
> - spapr_pci_msi value;
> -} spapr_pci_msi_mig;
> + SpaprPciMsi value;
> +} SpaprPciMsiMig;
> +
> +typedef struct SpaprPciLsi {
> + uint32_t irq;
> +} SpaprPciLsi;
> +
> +typedef struct SpaprPhbPciNvGpuConfig SpaprPhbPciNvGpuConfig;
>
> struct SpaprPhbState {
> PCIHostState parent_obj;
> @@ -63,14 +69,12 @@ struct SpaprPhbState {
> AddressSpace iommu_as;
> MemoryRegion iommu_root;
>
> - struct spapr_pci_lsi {
> - uint32_t irq;
> - } lsi_table[PCI_NUM_PINS];
> + SpaprPciLsi lsi_table[PCI_NUM_PINS];
>
> GHashTable *msi;
> /* Temporary cache for migration purposes */
> int32_t msi_devs_num;
> - spapr_pci_msi_mig *msi_devs;
> + SpaprPciMsiMig *msi_devs;
>
> QLIST_ENTRY(SpaprPhbState) list;
>
> @@ -89,7 +93,7 @@ struct SpaprPhbState {
> hwaddr mig_io_win_addr, mig_io_win_size;
> hwaddr nv2_gpa_win_addr;
> hwaddr nv2_atsd_win_addr;
> - struct spapr_phb_pci_nvgpu_config *nvgpus;
> + SpaprPhbPciNvGpuConfig *nvgpus;
> };
>
> #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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