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[Qemu-devel] [PATCH v1 9/9] tcg: Check for watchpoints in probe_write()
From: |
David Hildenbrand |
Subject: |
[Qemu-devel] [PATCH v1 9/9] tcg: Check for watchpoints in probe_write() |
Date: |
Fri, 23 Aug 2019 12:07:41 +0200 |
Let's check for write watchpoints. We'll want to do something similar
for probe_read() in the future (once we introduce that).
Suggested-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
accel/tcg/cputlb.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 4b49ccb58a..8382ac2fc2 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1063,6 +1063,7 @@ void probe_write(CPUArchState *env, target_ulong addr,
int size, int mmu_idx,
{
uintptr_t index = tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
+ target_ulong tlb_addr;
g_assert(-(addr | TARGET_PAGE_MASK) >= size);
@@ -1071,8 +1072,23 @@ void probe_write(CPUArchState *env, target_ulong addr,
int size, int mmu_idx,
if (!VICTIM_TLB_HIT(addr_write, addr)) {
tlb_fill(env_cpu(env), addr, size, MMU_DATA_STORE,
mmu_idx, retaddr);
+ /* TLB resize via tlb_fill may have moved the entry. */
+ entry = tlb_entry(env, mmu_idx, addr);
}
}
+
+ if (!size) {
+ return;
+ }
+ tlb_addr = tlb_addr_write(entry);
+
+ /* Watchpoints for this entry only apply if TLB_MMIO was set. */
+ if (tlb_addr & TLB_MMIO) {
+ MemTxAttrs attrs = env_tlb(env)->d[mmu_idx].iotlb[index].attrs;
+
+ cpu_check_watchpoint(env_cpu(env), addr, size, attrs, BP_MEM_WRITE,
+ retaddr);
+ }
}
void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
--
2.21.0
- [Qemu-devel] [PATCH v1 5/9] mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well, (continued)
- [Qemu-devel] [PATCH v1 9/9] tcg: Check for watchpoints in probe_write(),
David Hildenbrand <=