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Re: [Qemu-devel] [PATCH v2 03/68] target/arm: Convert Data Processing (r
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v2 03/68] target/arm: Convert Data Processing (register) |
Date: |
Thu, 22 Aug 2019 10:21:56 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 8/22/19 9:00 AM, Peter Maydell wrote:
> On Mon, 19 Aug 2019 at 22:38, Richard Henderson
> <address@hidden> wrote:
>>
>> Convert the register shifted by immediate form of the data
>> processing insns. For A32, we cannot yet remove any code
>> because the legacy decoder intertwines the reg-shifted-reg
>> and immediate forms.
>>
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>> target/arm/translate.c | 229 ++++++++++++++++++++++++++++++++++-------
>> target/arm/a32.decode | 28 +++++
>> target/arm/t32.decode | 43 ++++++++
>> 3 files changed, 264 insertions(+), 36 deletions(-)
>
>
>> +#define DO_ANY3(NAME, OP, L, K) \
>> + static bool trans_##NAME##_rrri(DisasContext *s, arg_s_rrr_shi *a) \
>> + { StoreRegKind k = (K); return op_s_rrr_shi(s, a, OP, L, k); }
>
> It's a bit non-obvious that we can return early via the expression K
> here (for the "trying to do an old-style exception return in usermode"
> case for SUB and MOV), but it does put the check early where we need it.
Yes, I know. I tried several different alternatives, but the macro expands 3
different functions with 3 different structures, and I couldn't find a way to
work around that. Especially...
>> +DO_ANY3(SUB, a->s ? gen_sub_CC : tcg_gen_sub_i32, false,
>> + ({
>> + StoreRegKind ret = STREG_NORMAL;
>> + if (a->rd == 15 && a->s) {
>> + /*
>> + * See ALUExceptionReturn:
>> + * In User mode, UNPREDICTABLE; we choose UNDEF.
>> + * In Hyp mode, UNDEFINED.
>> + */
>> + if (IS_USER(s) || s->current_el == 2) {
>> + return false;
>> + }
>> + /* There is no writeback of nzcv to PSTATE. */
>> + a->s = 0;
... with this modification. I suppose I could expand the comment above.
r~
- [Qemu-devel] [PATCH v2 00/68] target/arm: Convert aa32 base isa to decodetree, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 01/68] target/arm: Use store_reg_from_load in thumb2 code, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 02/68] target/arm: Add stubs for aa32 decodetree, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 03/68] target/arm: Convert Data Processing (register), Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 04/68] target/arm: Convert Data Processing (reg-shifted-reg), Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 07/68] target/arm: Simplify UMAAL, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 06/68] target/arm: Convert multiply and multiply accumulate, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 08/68] target/arm: Convert Saturating addition and subtraction, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 05/68] target/arm: Convert Data Processing (immediate), Richard Henderson, 2019/08/19