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[Qemu-devel] [PULL 24/42] ppc/xive: Provide backlog support
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 24/42] ppc/xive: Provide backlog support |
Date: |
Wed, 21 Aug 2019 17:25:24 +1000 |
From: Cédric Le Goater <address@hidden>
If backlog is activated ('b' bit) on the END, the pending priority of
a missed event is recorded in the IPB field of the NVT for a later
resend.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 77 +++++++++++++++++++++++++++++++-------------------
1 file changed, 48 insertions(+), 29 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index ab7ce64a83..f27b4e3328 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1411,46 +1411,22 @@ static bool xive_presenter_match(XiveRouter *xrtr,
uint8_t format,
*
* The parameters represent what is sent on the PowerBus
*/
-static void xive_presenter_notify(XiveRouter *xrtr, uint8_t format,
+static bool xive_presenter_notify(XiveRouter *xrtr, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv)
{
- XiveNVT nvt;
XiveTCTXMatch match = { .tctx = NULL, .ring = 0 };
bool found;
- /* NVT cache lookup */
- if (xive_router_get_nvt(xrtr, nvt_blk, nvt_idx, &nvt)) {
- qemu_log_mask(LOG_GUEST_ERROR, "XIVE: no NVT %x/%x\n",
- nvt_blk, nvt_idx);
- return;
- }
-
- if (!xive_nvt_is_valid(&nvt)) {
- qemu_log_mask(LOG_GUEST_ERROR, "XIVE: NVT %x/%x is invalid\n",
- nvt_blk, nvt_idx);
- return;
- }
-
found = xive_presenter_match(xrtr, format, nvt_blk, nvt_idx, cam_ignore,
priority, logic_serv, &match);
if (found) {
ipb_update(&match.tctx->regs[match.ring], priority);
xive_tctx_notify(match.tctx, match.ring);
- return;
}
- /* Record the IPB in the associated NVT structure */
- ipb_update((uint8_t *) &nvt.w4, priority);
- xive_router_write_nvt(xrtr, nvt_blk, nvt_idx, &nvt, 4);
-
- /*
- * If no matching NVT is dispatched on a HW thread :
- * - update the NVT structure if backlog is activated
- * - escalate (ESe PQ bits and EAS in w4-5) if escalation is
- * activated
- */
+ return found;
}
/*
@@ -1464,6 +1440,10 @@ static void xive_router_end_notify(XiveRouter *xrtr,
uint8_t end_blk,
XiveEND end;
uint8_t priority;
uint8_t format;
+ uint8_t nvt_blk;
+ uint32_t nvt_idx;
+ XiveNVT nvt;
+ bool found;
/* END cache lookup */
if (xive_router_get_end(xrtr, end_blk, end_idx, &end)) {
@@ -1522,14 +1502,53 @@ static void xive_router_end_notify(XiveRouter *xrtr,
uint8_t end_blk,
/*
* Follows IVPE notification
*/
- xive_presenter_notify(xrtr, format,
- xive_get_field32(END_W6_NVT_BLOCK, end.w6),
- xive_get_field32(END_W6_NVT_INDEX, end.w6),
+ nvt_blk = xive_get_field32(END_W6_NVT_BLOCK, end.w6);
+ nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end.w6);
+
+ /* NVT cache lookup */
+ if (xive_router_get_nvt(xrtr, nvt_blk, nvt_idx, &nvt)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "XIVE: no NVT %x/%x\n",
+ nvt_blk, nvt_idx);
+ return;
+ }
+
+ if (!xive_nvt_is_valid(&nvt)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "XIVE: NVT %x/%x is invalid\n",
+ nvt_blk, nvt_idx);
+ return;
+ }
+
+ found = xive_presenter_notify(xrtr, format, nvt_blk, nvt_idx,
xive_get_field32(END_W7_F0_IGNORE, end.w7),
priority,
xive_get_field32(END_W7_F1_LOG_SERVER_ID, end.w7));
/* TODO: Auto EOI. */
+
+ if (found) {
+ return;
+ }
+
+ /*
+ * If no matching NVT is dispatched on a HW thread :
+ * - specific VP: update the NVT structure if backlog is activated
+ * - logical server : forward request to IVPE (not supported)
+ */
+ if (xive_end_is_backlog(&end)) {
+ if (format == 1) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "XIVE: END %x/%x invalid config: F1 & backlog\n",
+ end_blk, end_idx);
+ return;
+ }
+ /* Record the IPB in the associated NVT structure */
+ ipb_update((uint8_t *) &nvt.w4, priority);
+ xive_router_write_nvt(xrtr, nvt_blk, nvt_idx, &nvt, 4);
+
+ /*
+ * On HW, follows a "Broadcast Backlog" to IVPEs
+ */
+ }
}
void xive_router_notify(XiveNotifier *xn, uint32_t lisn)
--
2.21.0
- [Qemu-devel] [PULL 25/42] ppc/xive: Provide escalation support, (continued)
- [Qemu-devel] [PULL 25/42] ppc/xive: Provide escalation support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 35/42] spapr/irq: Drop spapr_irq_msi_reset(), David Gibson, 2019/08/21
- [Qemu-devel] [PULL 28/42] ppc/xive: Improve 'info pic' support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 36/42] spapr: Implement better workaround in spapr-vty device, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 38/42] target/ppc: Add Directed Privileged Door-bell Exception State (DPDES) SPR, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 30/42] i386: use machine class ->wakeup method, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 22/42] ppc/xive: use an abstract type for XiveNotifier, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 27/42] ppc/xive: Provide silent escalation support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 41/42] ppc: Fix emulated INFINITY and NAN conversions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 31/42] spapr: Implement ibm,suspend-me, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 24/42] ppc/xive: Provide backlog support,
David Gibson <=
- [Qemu-devel] [PULL 32/42] ppc: remove idle_timer logic, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 42/42] ppc: Fix emulated single to double denormalized conversions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 40/42] ppc: conform to processor User's Manual for xscvdpspn, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 39/42] ppc: Add support for 'mffsl' instruction, David Gibson, 2019/08/21
- Re: [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, no-reply, 2019/08/21
- Re: [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, Peter Maydell, 2019/08/21