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[Qemu-devel] [PATCH v2] virtio-pci: Add Function Level Reset support
From: |
Julia Suvorova |
Subject: |
[Qemu-devel] [PATCH v2] virtio-pci: Add Function Level Reset support |
Date: |
Tue, 20 Aug 2019 18:30:05 +0200 |
Using FLR becomes convenient in cases where resetting the bus is
impractical, for example, when debugging the behavior of individual
functions.
Signed-off-by: Julia Suvorova <address@hidden>
---
Requires definition of 4.2 machines:
Based-on: <address@hidden>
v2:
Add compatibility property "x-pcie-flr-init"
hw/core/machine.c | 4 +++-
hw/virtio/virtio-pci.c | 10 ++++++++++
hw/virtio/virtio-pci.h | 4 ++++
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 83cd1bfeec..829ada099e 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -27,7 +27,9 @@
#include "hw/pci/pci.h"
#include "hw/mem/nvdimm.h"
-GlobalProperty hw_compat_4_1[] = {};
+GlobalProperty hw_compat_4_1[] = {
+ { "virtio-pci", "x-pcie-flr-init", "off" },
+};
const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
GlobalProperty hw_compat_4_0[] = {
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 8babd92e59..0075b3e2af 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -601,6 +601,10 @@ static void virtio_write_config(PCIDevice *pci_dev,
uint32_t address,
pci_default_write_config(pci_dev, address, val, len);
+ if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
+ pcie_cap_flr_write_config(pci_dev, address, val, len);
+ }
+
if (range_covers_byte(address, len, PCI_COMMAND) &&
!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
virtio_pci_stop_ioeventfd(proxy);
@@ -1777,6 +1781,10 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error
**errp)
pcie_ats_init(pci_dev, 256);
}
+ if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
+ /* Set Function Level Reset capability bit */
+ pcie_cap_flr_init(pci_dev);
+ }
} else {
/*
* make future invocations of pci_is_express() return false
@@ -1844,6 +1852,8 @@ static Property virtio_pci_properties[] = {
VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
+ DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
+ VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index 292275acb1..e2eaaa9182 100644
--- a/hw/virtio/virtio-pci.h
+++ b/hw/virtio/virtio-pci.h
@@ -44,6 +44,7 @@ enum {
VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
VIRTIO_PCI_FLAG_INIT_PM_BIT,
+ VIRTIO_PCI_FLAG_INIT_FLR_BIT,
};
/* Need to activate work-arounds for buggy guests at vmstate load. */
@@ -80,6 +81,9 @@ enum {
/* Init Power Management */
#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
+/* Init Function Level Reset capability */
+#define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
+
typedef struct {
MSIMessage msg;
int virq;
--
2.21.0
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