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[Qemu-devel] [PATCH v2 68/68] target/arm: Inline gen_bx_im into callers
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 68/68] target/arm: Inline gen_bx_im into callers |
Date: |
Mon, 19 Aug 2019 14:37:55 -0700 |
There are only two remaining uses of gen_bx_im. In each case, we
know the destination mode -- not changing in the case of gen_jmp
or changing in the case of trans_BLX_i. Use this to simplify the
surrounding code.
For trans_BLX_i, use gen_jmp for the actual branch. For gen_jmp,
use gen_set_pc_im to set up the single-step.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 26 +++++++-------------------
1 file changed, 7 insertions(+), 19 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index bac38e6261..9162ad113a 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -765,21 +765,6 @@ static inline void gen_set_pc_im(DisasContext *s,
target_ulong val)
tcg_gen_movi_i32(cpu_R[15], val);
}
-/* Set PC and Thumb state from an immediate address. */
-static inline void gen_bx_im(DisasContext *s, uint32_t addr)
-{
- TCGv_i32 tmp;
-
- s->base.is_jmp = DISAS_JUMP;
- if (s->thumb != (addr & 1)) {
- tmp = tcg_temp_new_i32();
- tcg_gen_movi_i32(tmp, addr & 1);
- tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUARMState, thumb));
- tcg_temp_free_i32(tmp);
- }
- tcg_gen_movi_i32(cpu_R[15], addr & ~1);
-}
-
/* Set PC and Thumb state from var. var is marked as dead. */
static inline void gen_bx(DisasContext *s, TCGv_i32 var)
{
@@ -2706,9 +2691,8 @@ static inline void gen_jmp (DisasContext *s, uint32_t
dest)
{
if (unlikely(is_singlestepping(s))) {
/* An indirect jump so that we still trigger the debug exception. */
- if (s->thumb)
- dest |= 1;
- gen_bx_im(s, dest);
+ gen_set_pc_im(s, dest);
+ s->base.is_jmp = DISAS_JUMP;
} else {
gen_goto_tb(s, 0, dest);
}
@@ -10016,12 +10000,16 @@ static bool trans_BL(DisasContext *s, arg_i *a)
static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)
{
+ TCGv_i32 tmp;
+
/* For A32, ARCH(5) is checked near the start of the uncond block. */
if (s->thumb && (a->imm & 2)) {
return false;
}
tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb);
- gen_bx_im(s, (read_pc(s) & ~3) + a->imm + !s->thumb);
+ tmp = tcg_const_i32(!s->thumb);
+ store_cpu_field(tmp, thumb);
+ gen_jmp(s, (read_pc(s) & ~3) + a->imm);
return true;
}
--
2.17.1
- [Qemu-devel] [PATCH v2 64/68] target/arm: Convert T16, load (literal), (continued)
- [Qemu-devel] [PATCH v2 64/68] target/arm: Convert T16, load (literal), Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 66/68] target/arm: Convert T16, long branches, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 67/68] target/arm: Clean up disas_thumb_insn, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 63/68] target/arm: Convert T16, shift immediate, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 65/68] target/arm: Convert T16, Unconditional branch, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 68/68] target/arm: Inline gen_bx_im into callers,
Richard Henderson <=
- Re: [Qemu-devel] [PATCH v2 00/68] target/arm: Convert aa32 base isa to decodetree, no-reply, 2019/08/19
- Re: [Qemu-devel] [PATCH v2 00/68] target/arm: Convert aa32 base isa to decodetree, Peter Maydell, 2019/08/27