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[Qemu-devel] [PATCH v8 17/37] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v8 17/37] target/mips: Clean up handling of CP0 register 0 |
Date: |
Mon, 19 Aug 2019 14:07:56 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 0.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 3 +++
target/mips/translate.c | 40 ++++++++++++++++++++--------------------
2 files changed, 23 insertions(+), 20 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index eda8350..e2f6844 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -279,6 +279,9 @@ typedef struct mips_def_t mips_def_t;
/* CP0 Register 00 */
#define CP0_REG00__INDEX 0
+#define CP0_REG00__MVPCONTROL 1
+#define CP0_REG00__MVPCONF0 2
+#define CP0_REG00__MVPCONF1 3
#define CP0_REG00__VPCONTROL 4
/* CP0 Register 01 */
/* CP0 Register 02 */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index fe4a05c..06a1646 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6853,26 +6853,26 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
switch (reg) {
case CP0_REGISTER_00:
switch (sel) {
- case 0:
+ case CP0_REG00__INDEX:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index));
register_name = "Index";
break;
- case 1:
+ case CP0_REG00__MVPCONTROL:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpcontrol(arg, cpu_env);
register_name = "MVPControl";
break;
- case 2:
+ case CP0_REG00__MVPCONF0:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpconf0(arg, cpu_env);
register_name = "MVPConf0";
break;
- case 3:
+ case CP0_REG00__MVPCONF1:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpconf1(arg, cpu_env);
register_name = "MVPConf1";
break;
- case 4:
+ case CP0_REG00__VPCONTROL:
CP0_CHECK(ctx->vp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPControl));
register_name = "VPControl";
@@ -7621,26 +7621,26 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
switch (reg) {
case CP0_REGISTER_00:
switch (sel) {
- case 0:
+ case CP0_REG00__INDEX:
gen_helper_mtc0_index(cpu_env, arg);
register_name = "Index";
break;
- case 1:
+ case CP0_REG00__MVPCONTROL:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mtc0_mvpcontrol(cpu_env, arg);
register_name = "MVPControl";
break;
- case 2:
+ case CP0_REG00__MVPCONF0:
CP0_CHECK(ctx->insn_flags & ASE_MT);
/* ignored */
register_name = "MVPConf0";
break;
- case 3:
+ case CP0_REG00__MVPCONF1:
CP0_CHECK(ctx->insn_flags & ASE_MT);
/* ignored */
register_name = "MVPConf1";
break;
- case 4:
+ case CP0_REG00__VPCONTROL:
CP0_CHECK(ctx->vp);
/* ignored */
register_name = "VPControl";
@@ -8373,26 +8373,26 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
switch (reg) {
case CP0_REGISTER_00:
switch (sel) {
- case 0:
+ case CP0_REG00__INDEX:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index));
register_name = "Index";
break;
- case 1:
+ case CP0_REG00__MVPCONTROL:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpcontrol(arg, cpu_env);
register_name = "MVPControl";
break;
- case 2:
+ case CP0_REG00__MVPCONF0:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpconf0(arg, cpu_env);
register_name = "MVPConf0";
break;
- case 3:
+ case CP0_REG00__MVPCONF1:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mfc0_mvpconf1(arg, cpu_env);
register_name = "MVPConf1";
break;
- case 4:
+ case CP0_REG00__VPCONTROL:
CP0_CHECK(ctx->vp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPControl));
register_name = "VPControl";
@@ -9095,26 +9095,26 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
switch (reg) {
case CP0_REGISTER_00:
switch (sel) {
- case 0:
+ case CP0_REG00__INDEX:
gen_helper_mtc0_index(cpu_env, arg);
register_name = "Index";
break;
- case 1:
+ case CP0_REG00__MVPCONTROL:
CP0_CHECK(ctx->insn_flags & ASE_MT);
gen_helper_mtc0_mvpcontrol(cpu_env, arg);
register_name = "MVPControl";
break;
- case 2:
+ case CP0_REG00__MVPCONF0:
CP0_CHECK(ctx->insn_flags & ASE_MT);
/* ignored */
register_name = "MVPConf0";
break;
- case 3:
+ case CP0_REG00__MVPCONF1:
CP0_CHECK(ctx->insn_flags & ASE_MT);
/* ignored */
register_name = "MVPConf1";
break;
- case 4:
+ case CP0_REG00__VPCONTROL:
CP0_CHECK(ctx->vp);
/* ignored */
register_name = "VPControl";
--
2.7.4
- [Qemu-devel] [PATCH v8 23/37] target/mips: Clean up handling of CP0 register 8, (continued)
- [Qemu-devel] [PATCH v8 23/37] target/mips: Clean up handling of CP0 register 8, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 06/37] target/mips: Style improvements in cp0_timer.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 25/37] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 22/37] target/mips: Clean up handling of CP0 register 7, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 18/37] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 21/37] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 28/37] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 19/37] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 29/37] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 27/37] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 17/37] target/mips: Clean up handling of CP0 register 0,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v8 30/37] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 20/37] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 24/37] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 26/37] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 15/37] target/mips: Style improvements in mips_malta.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 31/37] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 11/37] target/mips: Style improvements in translate.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 33/37] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/19