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[Qemu-devel] [PATCH v4 02/15] hw/i386/pc: Extract e820 memory layout cod
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v4 02/15] hw/i386/pc: Extract e820 memory layout code |
Date: |
Mon, 19 Aug 2019 00:54:01 +0200 |
Suggested-by: Samuel Ortiz <address@hidden>
Reviewed-by: Li Qiang <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
v3: KISS, do not use unsigned, do not add broken documentation
---
hw/i386/Makefile.objs | 2 +-
hw/i386/e820_memory_layout.c | 59 ++++++++++++++++++++++++++++++++++
hw/i386/e820_memory_layout.h | 42 +++++++++++++++++++++++++
hw/i386/pc.c | 61 +-----------------------------------
include/hw/i386/pc.h | 11 -------
target/i386/kvm.c | 1 +
6 files changed, 104 insertions(+), 72 deletions(-)
create mode 100644 hw/i386/e820_memory_layout.c
create mode 100644 hw/i386/e820_memory_layout.h
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 5d9c9efd5f..d3374e0831 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -1,5 +1,5 @@
obj-$(CONFIG_KVM) += kvm/
-obj-y += multiboot.o
+obj-y += e820_memory_layout.o multiboot.o
obj-y += pc.o
obj-$(CONFIG_I440FX) += pc_piix.o
obj-$(CONFIG_Q35) += pc_q35.o
diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c
new file mode 100644
index 0000000000..bcf9eaf837
--- /dev/null
+++ b/hw/i386/e820_memory_layout.c
@@ -0,0 +1,59 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bswap.h"
+#include "e820_memory_layout.h"
+
+static size_t e820_entries;
+struct e820_table e820_reserve;
+struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+{
+ int index = le32_to_cpu(e820_reserve.count);
+ struct e820_entry *entry;
+
+ if (type != E820_RAM) {
+ /* old FW_CFG_E820_TABLE entry -- reservations only */
+ if (index >= E820_NR_ENTRIES) {
+ return -EBUSY;
+ }
+ entry = &e820_reserve.entry[index++];
+
+ entry->address = cpu_to_le64(address);
+ entry->length = cpu_to_le64(length);
+ entry->type = cpu_to_le32(type);
+
+ e820_reserve.count = cpu_to_le32(index);
+ }
+
+ /* new "etc/e820" file -- include ram too */
+ e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
+ e820_table[e820_entries].address = cpu_to_le64(address);
+ e820_table[e820_entries].length = cpu_to_le64(length);
+ e820_table[e820_entries].type = cpu_to_le32(type);
+ e820_entries++;
+
+ return e820_entries;
+}
+
+int e820_get_num_entries(void)
+{
+ return e820_entries;
+}
+
+bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t
*length)
+{
+ if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
+ *address = le64_to_cpu(e820_table[idx].address);
+ *length = le64_to_cpu(e820_table[idx].length);
+ return true;
+ }
+ return false;
+}
diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h
new file mode 100644
index 0000000000..2a0ceb8b9c
--- /dev/null
+++ b/hw/i386/e820_memory_layout.h
@@ -0,0 +1,42 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef HW_I386_E820_H
+#define HW_I386_E820_H
+
+/* e820 types */
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3
+#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#define E820_NR_ENTRIES 16
+
+struct e820_entry {
+ uint64_t address;
+ uint64_t length;
+ uint32_t type;
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+struct e820_table {
+ uint32_t count;
+ struct e820_entry entry[E820_NR_ENTRIES];
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+extern struct e820_table e820_reserve;
+extern struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type);
+int e820_get_num_entries(void);
+bool e820_get_entry(int index, uint32_t type,
+ uint64_t *address, uint64_t *length);
+
+
+
+#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ab1fe1169a..75cdf57922 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -87,6 +87,7 @@
#include "sysemu/replay.h"
#include "qapi/qmp/qerror.h"
#include "config-devices.h"
+#include "e820_memory_layout.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -98,22 +99,6 @@
#define DPRINTF(fmt, ...)
#endif
-#define E820_NR_ENTRIES 16
-
-struct e820_entry {
- uint64_t address;
- uint64_t length;
- uint32_t type;
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-struct e820_table {
- uint32_t count;
- struct e820_entry entry[E820_NR_ENTRIES];
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-static struct e820_table e820_reserve;
-static struct e820_entry *e820_table;
-static unsigned e820_entries;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
/* Physical Address of PVH entry point read from kernel ELF NOTE */
@@ -877,50 +862,6 @@ static void handle_a20_line_change(void *opaque, int irq,
int level)
x86_cpu_set_a20(cpu, level);
}
-int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
-{
- int index = le32_to_cpu(e820_reserve.count);
- struct e820_entry *entry;
-
- if (type != E820_RAM) {
- /* old FW_CFG_E820_TABLE entry -- reservations only */
- if (index >= E820_NR_ENTRIES) {
- return -EBUSY;
- }
- entry = &e820_reserve.entry[index++];
-
- entry->address = cpu_to_le64(address);
- entry->length = cpu_to_le64(length);
- entry->type = cpu_to_le32(type);
-
- e820_reserve.count = cpu_to_le32(index);
- }
-
- /* new "etc/e820" file -- include ram too */
- e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
- e820_table[e820_entries].address = cpu_to_le64(address);
- e820_table[e820_entries].length = cpu_to_le64(length);
- e820_table[e820_entries].type = cpu_to_le32(type);
- e820_entries++;
-
- return e820_entries;
-}
-
-int e820_get_num_entries(void)
-{
- return e820_entries;
-}
-
-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t
*length)
-{
- if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
- *address = le64_to_cpu(e820_table[idx].address);
- *length = le64_to_cpu(e820_table[idx].length);
- return true;
- }
- return false;
-}
-
/* Calculates initial APIC ID for a specific CPU index
*
* Currently we need to be able to calculate the APIC ID from the CPU index
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 4bb9e29114..18b31b1292 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -290,17 +290,6 @@ void pc_system_firmware_init(PCMachineState *pcms,
MemoryRegion *rom_memory);
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry);
-/* e820 types */
-#define E820_RAM 1
-#define E820_RESERVED 2
-#define E820_ACPI 3
-#define E820_NVS 4
-#define E820_UNUSABLE 5
-
-int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
-
extern GlobalProperty pc_compat_4_0[];
extern const size_t pc_compat_4_0_len;
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 2abc881324..af9a762c1d 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -41,6 +41,7 @@
#include "hw/i386/apic-msidef.h"
#include "hw/i386/intel_iommu.h"
#include "hw/i386/x86-iommu.h"
+#include "hw/i386/e820_memory_layout.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
--
2.20.1
- [Qemu-devel] [PATCH v4 00/15] hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 01/15] hw/i386/pc: Use e820_get_num_entries() to access e820_entries, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 02/15] hw/i386/pc: Extract e820 memory layout code,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v4 03/15] hw/i386/pc: Use address_space_memory in place, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 04/15] hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 05/15] hw/i386/pc: Pass the boot_cpus value by argument, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 06/15] hw/i386/pc: Pass the apic_id_limit value by argument, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 07/15] hw/i386/pc: Pass the CPUArchIdList array by argument, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 08/15] hw/i386/pc: Remove unused PCMachineState argument in fw_cfg_arch_create, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 09/15] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 10/15] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument, Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 11/15] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios(), Philippe Mathieu-Daudé, 2019/08/18
- [Qemu-devel] [PATCH v4 12/15] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument, Philippe Mathieu-Daudé, 2019/08/18