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Re: [Qemu-devel] [PATCH v5 2/3] aspeed: add a GPIO controller to the SoC
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH v5 2/3] aspeed: add a GPIO controller to the SoC |
Date: |
Fri, 16 Aug 2019 18:00:12 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 16/08/2019 09:32, Rashmica Gupta wrote:
> Signed-off-by: Rashmica Gupta <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Thanks,
C.
> ---
> include/hw/arm/aspeed_soc.h | 3 +++
> hw/arm/aspeed_soc.c | 17 +++++++++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index cef605ad6b..fa04abddd8 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -22,6 +22,7 @@
> #include "hw/ssi/aspeed_smc.h"
> #include "hw/watchdog/wdt_aspeed.h"
> #include "hw/net/ftgmac100.h"
> +#include "hw/gpio/aspeed_gpio.h"
>
> #define ASPEED_SPIS_NUM 2
> #define ASPEED_WDTS_NUM 3
> @@ -47,6 +48,7 @@ typedef struct AspeedSoCState {
> AspeedSDMCState sdmc;
> AspeedWDTState wdt[ASPEED_WDTS_NUM];
> FTGMAC100State ftgmac100[ASPEED_MACS_NUM];
> + AspeedGPIOState gpio;
> } AspeedSoCState;
>
> #define TYPE_ASPEED_SOC "aspeed-soc"
> @@ -60,6 +62,7 @@ typedef struct AspeedSoCInfo {
> int spis_num;
> const char *fmc_typename;
> const char **spi_typename;
> + const char *gpio_typename;
> int wdts_num;
> const int *irqmap;
> const hwaddr *memmap;
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index c6fb3700f2..ff422c8ad1 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -124,6 +124,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> .spis_num = 1,
> .fmc_typename = "aspeed.smc.fmc",
> .spi_typename = aspeed_soc_ast2400_typenames,
> + .gpio_typename = "aspeed.gpio-ast2400",
> .wdts_num = 2,
> .irqmap = aspeed_soc_ast2400_irqmap,
> .memmap = aspeed_soc_ast2400_memmap,
> @@ -136,6 +137,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> .spis_num = 1,
> .fmc_typename = "aspeed.smc.fmc",
> .spi_typename = aspeed_soc_ast2400_typenames,
> + .gpio_typename = "aspeed.gpio-ast2400",
> .wdts_num = 2,
> .irqmap = aspeed_soc_ast2400_irqmap,
> .memmap = aspeed_soc_ast2400_memmap,
> @@ -148,6 +150,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> .spis_num = 1,
> .fmc_typename = "aspeed.smc.fmc",
> .spi_typename = aspeed_soc_ast2400_typenames,
> + .gpio_typename = "aspeed.gpio-ast2400",
> .wdts_num = 2,
> .irqmap = aspeed_soc_ast2400_irqmap,
> .memmap = aspeed_soc_ast2400_memmap,
> @@ -160,6 +163,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> .spis_num = 2,
> .fmc_typename = "aspeed.smc.ast2500-fmc",
> .spi_typename = aspeed_soc_ast2500_typenames,
> + .gpio_typename = "aspeed.gpio-ast2500",
> .wdts_num = 3,
> .irqmap = aspeed_soc_ast2500_irqmap,
> .memmap = aspeed_soc_ast2500_memmap,
> @@ -246,6 +250,9 @@ static void aspeed_soc_init(Object *obj)
>
> sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma),
> TYPE_ASPEED_XDMA);
> +
> + sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio),
> + sc->info->gpio_typename);
> }
>
> static void aspeed_soc_realize(DeviceState *dev, Error **errp)
> @@ -425,6 +432,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error
> **errp)
> sc->info->memmap[ASPEED_XDMA]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0,
> aspeed_soc_get_irq(s, ASPEED_XDMA));
> +
> + /* GPIO */
> + object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
> sc->info->memmap[ASPEED_GPIO]);
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
> + aspeed_soc_get_irq(s, ASPEED_GPIO));
> }
> static Property aspeed_soc_properties[] = {
> DEFINE_PROP_UINT32("num-cpus", AspeedSoCState, num_cpus, 0),
>
- [Qemu-devel] [PATCH v4 3/3] hw/gpio: Add in AST2600 specific implementation, (continued)
- [Qemu-devel] [PATCH v4 3/3] hw/gpio: Add in AST2600 specific implementation, Rashmica Gupta, 2019/08/14
- [Qemu-devel] [PATCH v4 1/3] hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500, Rashmica Gupta, 2019/08/14
- Re: [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model, no-reply, 2019/08/14
- [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model, Rashmica Gupta, 2019/08/16
- [Qemu-devel] [PATCH v5 1/3] hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500, Rashmica Gupta, 2019/08/16
- [Qemu-devel] [PATCH v5 3/3] hw/gpio: Add in AST2600 specific implementation, Rashmica Gupta, 2019/08/16
- Re: [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model, Cédric Le Goater, 2019/08/16