Re: [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements

[Cornelia Huck]

On Wed, 14 Aug 2019 17:12:42 +0200
David Hildenbrand <address@hidden> wrote:

> Wrong order of operands. The constant always comes last. Makes QEMU crash
> reliably on specific git fetch invocations.
> 
> Reported-by: Stefano Brivio <address@hidden>
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
> 
> I guess it is too late for 4.1 :(
> 
> ---
>  target/s390x/translate_vx.inc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
> index 41d5cf869f..0caddb3958 100644
> --- a/target/s390x/translate_vx.inc.c
> +++ b/target/s390x/translate_vx.inc.c
> @@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t 
> reg, TCGv_i64 enr,
>                         vec_full_reg_offset(v3), ptr, 16, 16, data, fn)
>  #define gen_gvec_3i(v1, v2, v3, c, gen) \
>      tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
> -                    vec_full_reg_offset(v3), c, 16, 16, gen)
> +                    vec_full_reg_offset(v3), 16, 16, c, gen)
>  #define gen_gvec_4(v1, v2, v3, v4, gen) \
>      tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
>                     vec_full_reg_offset(v3), vec_full_reg_offset(v4), \

Reviewed-by: Cornelia Huck <address@hidden>
Fixes: 5c4b0ab460ef ("s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT 
UNDER MASK")
Cc: address@hidden

Thanks, applied.