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Re: [Qemu-devel] [PATCH 3/3] target/riscv: Remove redundant declaration
From: |
Alistair Francis |
Subject: |
Re: [Qemu-devel] [PATCH 3/3] target/riscv: Remove redundant declaration pragmas |
Date: |
Fri, 9 Aug 2019 19:03:05 -0700 |
On Fri, Aug 9, 2019 at 8:43 AM Richard Henderson
<address@hidden> wrote:
>
> These are now generated by decodetree itself.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> target/riscv/translate.c | 19 +------------------
> 1 file changed, 1 insertion(+), 18 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 8d6ab73258..adeddb85f6 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -708,26 +708,9 @@ static bool gen_shift(DisasContext *ctx, arg_r *a,
> #include "insn_trans/trans_rvd.inc.c"
> #include "insn_trans/trans_privileged.inc.c"
>
> -/*
> - * Auto-generated decoder.
> - * Note that the 16-bit decoder reuses some of the trans_* functions
> - * initially declared by the 32-bit decoder, which results in duplicate
> - * declaration warnings. Suppress them.
> - */
> -#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
> -# pragma GCC diagnostic push
> -# pragma GCC diagnostic ignored "-Wredundant-decls"
> -# ifdef __clang__
> -# pragma GCC diagnostic ignored "-Wtypedef-redefinition"
> -# endif
> -#endif
> -
> +/* Include the auto-generated decoder for 16 bit insn */
> #include "decode_insn16.inc.c"
>
> -#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
> -# pragma GCC diagnostic pop
> -#endif
> -
> static void decode_opc(DisasContext *ctx)
> {
> /* check for compressed insn */
> --
> 2.17.1
>
>
- [Qemu-devel] [PATCH 1/3] decodetree: Allow !function with no input bits, (continued)