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[Qemu-devel] [RFC PATCH 05/20] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EA
From: |
Sean Christopherson |
Subject: |
[Qemu-devel] [RFC PATCH 05/20] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX |
Date: |
Tue, 6 Aug 2019 11:56:34 -0700 |
CPUID leaf 12_0_EAX is an Intel-defined feature bits leaf enumerating
the CPU's SGX capabilities, e.g. supported SGX instruction sets.
Currently there are four enumerated capabilities:
- SGX1 instruction set, i.e. "base" SGX
- SGX2 instruction set for dynamic EPC management
- ENCLV instruction set for VMM oversubscription of EPC
- ENCLS-C instruction set for thread safe variants of ENCLS
Signed-off-by: Sean Christopherson <address@hidden>
---
target/i386/cpu.c | 20 ++++++++++++++++++++
target/i386/cpu.h | 1 +
2 files changed, 21 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f529fb0dc8..e954eca4dd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -775,6 +775,7 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t
vendor1,
#define TCG_XSAVE_FEATURES (CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1)
/* missing:
CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */
+#define TCG_SGX_12_0_EAX_FEATURES 0
typedef enum FeatureWordType {
CPUID_FEATURE_WORD,
@@ -1224,6 +1225,25 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS]
= {
},
},
},
+ [FEAT_SGX_12_0_EAX] = {
+ .type = CPUID_FEATURE_WORD,
+ .feat_names = {
+ "sgx1", "sgx2", NULL, NULL,
+ NULL, "sgx-enclv", "sgx-encls-c", NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .cpuid = {
+ .eax = 0x12,
+ .needs_ecx = true, .ecx = 0,
+ .reg = R_EAX,
+ },
+ .tcg_features = TCG_SGX_12_0_EAX_FEATURES,
+ },
};
typedef struct X86RegisterInfo32 {
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 62adb2e0d0..6803b1b41d 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -506,6 +506,7 @@ typedef enum FeatureWord {
FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
FEAT_ARCH_CAPABILITIES,
FEAT_CORE_CAPABILITY,
+ FEAT_SGX_12_0_EAX, /* CPUID[EAX=0x12,ECX=0].EAX (SGX) */
FEATURE_WORDS,
} FeatureWord;
--
2.22.0
- [Qemu-devel] [RFC PATCH 00/20] i386: Add support for Intel SGX, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 08/20] i386: Add get/set/migrate support for SGX LE public key hash MSRs, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 01/20] hostmem: Add hostmem-epc as a backend for SGX EPC, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 09/20] i386: Add feature control MSR dependency when SGX is enabled, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 05/20] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX,
Sean Christopherson <=
- [Qemu-devel] [RFC PATCH 04/20] i386: Add primary SGX CPUID and MSR defines, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 15/20] hw/i386/pc: Set SGX bits in feature control fw_cfg accordingly, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 17/20] i386/pc: Add e820 entry for SGX EPC section(s), Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 10/20] i386: Update SGX CPUID info according to hardware/KVM/user input, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 14/20] i386: Adjust min CPUID level to 0x12 when SGX is enabled, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 06/20] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 12/20] i386: kvm: Add support for exposing PROVISIONKEY to guest, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 07/20] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EBX, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 11/20] linux-headers: Add temporary placeholder for KVM_CAP_SGX_ATTRIBUTE, Sean Christopherson, 2019/08/06
- [Qemu-devel] [RFC PATCH 02/20] i386: Add 'sgx-epc' device to expose EPC sections to guest, Sean Christopherson, 2019/08/06