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[Qemu-devel] [PATCH for 4.2 v6 03/22] target/mips: Amend CP0 MemoryMapID
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH for 4.2 v6 03/22] target/mips: Amend CP0 MemoryMapID register implementation |
Date: |
Mon, 5 Aug 2019 12:09:01 +0200 |
From: Yongbok Kim <address@hidden>
Add migration support and fix preprocessor constant name for
MemoryMapID register.
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 2 +-
target/mips/machine.c | 7 +++++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6406ba8..eda8350 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -290,7 +290,7 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG04__CONTEXT 0
#define CP0_REG04__USERLOCAL 2
#define CP0_REG04__DBGCONTEXTID 4
-#define CP0_REG00__MMID 5
+#define CP0_REG04__MEMORYMAPID 5
/* CP0 Register 05 */
#define CP0_REG05__PAGEMASK 0
#define CP0_REG05__PAGEGRAIN 1
diff --git a/target/mips/machine.c b/target/mips/machine.c
index c3e52f8..e23b767 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -137,6 +137,7 @@ static int get_tlb(QEMUFile *f, void *pv, size_t size,
qemu_get_betls(f, &v->VPN);
qemu_get_be32s(f, &v->PageMask);
qemu_get_be16s(f, &v->ASID);
+ qemu_get_be32s(f, &v->MMID);
qemu_get_be16s(f, &flags);
v->G = (flags >> 10) & 1;
v->C0 = (flags >> 7) & 3;
@@ -162,6 +163,7 @@ static int put_tlb(QEMUFile *f, void *pv, size_t size,
r4k_tlb_t *v = pv;
uint16_t asid = v->ASID;
+ uint32_t mmid = v->MMID;
uint16_t flags = ((v->EHINV << 15) |
(v->RI1 << 14) |
(v->RI0 << 13) |
@@ -178,6 +180,7 @@ static int put_tlb(QEMUFile *f, void *pv, size_t size,
qemu_put_betls(f, &v->VPN);
qemu_put_be32s(f, &v->PageMask);
qemu_put_be16s(f, &asid);
+ qemu_put_be32s(f, &mmid);
qemu_put_be16s(f, &flags);
qemu_put_be64s(f, &v->PFN[0]);
qemu_put_be64s(f, &v->PFN[1]);
@@ -199,8 +202,8 @@ const VMStateInfo vmstate_info_tlb = {
const VMStateDescription vmstate_tlb = {
.name = "cpu/tlb",
- .version_id = 2,
- .minimum_version_id = 2,
+ .version_id = 3,
+ .minimum_version_id = 3,
.fields = (VMStateField[]) {
VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
--
2.7.4
- [Qemu-devel] [PATCH for 4.2 v6 00/22] target/mips: Misc patches for 4.2, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 05/22] target/mips: Add support for emulation of CRC32 group of instructions, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 10/22] target/mips: Style improvements in machine.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 15/22] target/mips: Style improvements in mips_mipssim.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 03/22] target/mips: Amend CP0 MemoryMapID register implementation,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH for 4.2 v6 01/22] target/mips: Add support for DSPRAM, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 12/22] target/mips: Style improvements in mips_fulong2e.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 13/22] target/mips: Style improvements in mips_int.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 07/22] target/mips: Style improvements in cpu.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 09/22] target/mips: Style improvements in internal.h, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 06/22] target/mips: Style improvements in cp0_timer.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 04/22] target/mips: Add support for emulation of GINVT instruction, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 02/22] target/mips: Amend CP0 WatchHi register implementation, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 11/22] target/mips: Style improvements in cps.c, Aleksandar Markovic, 2019/08/05
- [Qemu-devel] [PATCH for 4.2 v6 18/22] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/05