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[Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-o
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1 |
Date: |
Wed, 24 Oct 2018 15:40:39 +0200 |
From: Fredrik Noring <address@hidden>
Add a test for MULTU1.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Fredrik Noring <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
tests/tcg/mips/mipsr5900/multu.c | 43 +++++++++++++++++++++++++++++++++-------
1 file changed, 36 insertions(+), 7 deletions(-)
diff --git a/tests/tcg/mips/mipsr5900/multu.c b/tests/tcg/mips/mipsr5900/multu.c
index 3a59675..f043904 100644
--- a/tests/tcg/mips/mipsr5900/multu.c
+++ b/tests/tcg/mips/mipsr5900/multu.c
@@ -1,5 +1,5 @@
/*
- * Test R5900-specific three-operand MULTU.
+ * Test R5900-specific three-operand MULTU and MULTU1.
*/
#include <stdio.h>
@@ -25,15 +25,44 @@ static uint64_t multu(uint32_t rs, uint32_t rt)
return r;
}
+static uint64_t multu1(uint32_t rs, uint32_t rt)
+{
+ uint32_t rd, lo, hi;
+ uint64_t r;
+
+ __asm__ __volatile__ (
+ " multu1 %0, %3, %4\n"
+ " mflo1 %1\n"
+ " mfhi1 %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt));
+ r = ((uint64_t)hi << 32) | (uint32_t)lo;
+
+ assert((uint64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+static uint64_t multu_variants(uint32_t rs, uint32_t rt)
+{
+ uint64_t rd = multu(rs, rt);
+ uint64_t rd1 = multu1(rs, rt);
+
+ assert(rd == rd1);
+
+ return rd;
+}
+
int main()
{
- assert(multu(17, 19) == 323);
- assert(multu(77773, 99991) == 7776600043);
- assert(multu(12207031, 305175781) == 3725290219116211);
+ assert(multu_variants(17, 19) == 323);
+ assert(multu_variants(77773, 99991) == 7776600043);
+ assert(multu_variants(12207031, 305175781) == 3725290219116211);
- assert(multu(0x80000000U, 0x7FFFFFFF) == 0x3FFFFFFF80000000);
- assert(multu(0x80000000U, 0x80000000U) == 0x4000000000000000);
- assert(multu(0xFFFFFFFFU, 0xFFFFFFFFU) == 0xFFFFFFFE00000001U);
+ assert(multu_variants(0x80000000U, 0x7FFFFFFF) == 0x3FFFFFFF80000000);
+ assert(multu_variants(0x80000000U, 0x80000000U) == 0x4000000000000000);
+ assert(multu_variants(0xFFFFFFFFU, 0xFFFFFFFFU) == 0xFFFFFFFE00000001U);
return 0;
}
--
2.7.4
- [Qemu-devel] [PULL v2 08/33] target/mips: Define R5900 MMI3 opcode constants, (continued)
- [Qemu-devel] [PULL v2 08/33] target/mips: Define R5900 MMI3 opcode constants, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 20/33] target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 29/33] tests/tcg/mips: Add tests for R5900 DIVU1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 24/33] tests/tcg/mips: Add tests for R5900 three-operand MULT1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 17/33] target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 23/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 18/33] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 30/33] target/mips: Define the R5900 CPU, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 26/33] tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 22/33] tests/tcg/mips: Add tests for R5900 three-operand MULT, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v2 21/33] target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MMI3 instruction subclass, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 19/33] target/mips: Support R5900 DIV1 and DIVU1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 28/33] tests/tcg/mips: Add tests for R5900 DIV1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 27/33] tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 32/33] target/mips: Fix the title of translate.c, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 33/33] target/mips: Fix decoding of ALIGN and DALIGN instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 31/33] linux-user/mips: Recognize the R5900 CPU model, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 07/33] target/mips: Define R5900 MMI2 opcode constants, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ, Aleksandar Markovic, 2018/10/24