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[Qemu-devel] [PATCH 0/7] Add limited MXU instruction support
From: |
Craig Janeczek |
Subject: |
[Qemu-devel] [PATCH 0/7] Add limited MXU instruction support |
Date: |
Fri, 24 Aug 2018 15:44:01 -0400 |
This patch set begins to add MXU instruction support for mips
emulation. The patches are split such that the register overhead
is added first followed by a series of instructions.
Craig Janeczek (7):
target/mips: Add MXU register support
target/mips: Add MXU instructions S32I2M and S32M2I
target/mips: Add MXU instruction S8LDD
target/mips: Add MXU instruction D16MUL
target/mips: Add MXU instruction D16MAC
target/mips: Add MXU instructions Q8MUL and Q8MULSU
target/mips: Add MXU instructions S32LDD and S32LDDR
target/mips/cpu.h | 1 +
target/mips/translate.c | 401 +++++++++++++++++++++++++++++++++++++++-
2 files changed, 398 insertions(+), 4 deletions(-)
--
2.18.0
- [Qemu-devel] [PATCH 0/7] Add limited MXU instruction support,
Craig Janeczek <=
[Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support, Craig Janeczek, 2018/08/24