Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space

[Paolo Bonzini]

(sorry for top posting)

Because the emulation quality is indeed a bit better with the per-CPU address spaces; you could move each APIC's base address independent of the others. However, this is not a feature that is actually used by anything in practice, so I doubt anyone cares about TCG implementing it correctly.

Paolo


-----Original Message-----
From: Peter Maydell address@hidden
Received: lunedì, 24 ago 2015, 16:57
To: Paolo Bonzini address@hidden
CC: Eduardo Habkost address@hidden; Zhu Guihua address@hidden; ChenFan address@hidden; Igor Mammedov address@hidden; address@hidden, QEMU Developers address@hidden; Andreas Färber address@hidden
Subject: Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space

On 24 August 2015 at 01:55, Paolo Bonzini <address@hidden> wrote:
>
>
> On 21/08/2015 15:54, Eduardo Habkost wrote:
>> > +    if (tcg_enabled()) {
>> > +        memory_region_add_subregion_overlap(cpu->cpu_as_root,
>> > +                                            apic->apicbase &
>> > +                                            MSR_IA32_APICBASE_BASE,
>> > +                                            &apic->io_memory,
>> > +                                            0x1000);
>>
>> Why exactly is this necessary? If this is necessary, why don't we need
>> to do this for non-TCG accelerators?
>
> At least KVM and qtest do not support per-CPU address spaces.

Right, but given this restriction why can't we also do whatever
we need to work without the per-CPU address spaces with TCG?

thanks
-- PMM