[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [RFC PATCH v2 01/23] spapr: enable PHB/CPU/LMB hotplug for
From: |
Bharata B Rao |
Subject: |
[Qemu-devel] [RFC PATCH v2 01/23] spapr: enable PHB/CPU/LMB hotplug for pseries-2.3 |
Date: |
Mon, 23 Mar 2015 19:05:42 +0530 |
From: Michael Roth <address@hidden>
Introduce an sPAPRMachineClass sub-class of MachineClass to
handle sPAPR-specific machine configuration properties.
The 'dr_phb[cpu,lmb]_enabled' field of that class can be set as
part of machine-specific init code, and is then propagated
to sPAPREnvironment to conditional enable creation of DRC
objects and device-tree description to facilitate hotplug
of PHBs/CPUs/LMBs.
Since we can't migrate this state to older machine types,
default the option to false and only enable it for new
machine types.
Signed-off-by: Michael Roth <address@hidden>
Signed-off-by: Bharata B Rao <address@hidden>
[Added CPU and LMB bits]
Reviewed-by: Michael Roth <address@hidden>
Reviewed-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 32 ++++++++++++++++++++++++++++++++
include/hw/ppc/spapr.h | 3 +++
2 files changed, 35 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 74ee277..a782e28 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -90,11 +90,29 @@
#define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
+typedef struct sPAPRMachineClass sPAPRMachineClass;
typedef struct sPAPRMachineState sPAPRMachineState;
#define TYPE_SPAPR_MACHINE "spapr-machine"
#define SPAPR_MACHINE(obj) \
OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
+#define SPAPR_MACHINE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(sPAPRMachineClass, obj, TYPE_SPAPR_MACHINE)
+#define SPAPR_MACHINE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(sPAPRMachineClass, klass, TYPE_SPAPR_MACHINE)
+
+/**
+ * sPAPRMachineClass:
+ */
+struct sPAPRMachineClass {
+ /*< private >*/
+ MachineClass parent_class;
+
+ /*< public >*/
+ bool dr_phb_enabled; /* enable dynamic-reconfig/hotplug of PHBs */
+ bool dr_cpu_enabled; /* enable dynamic-reconfig/hotplug of CPUs */
+ bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
+};
/**
* sPAPRMachineState:
@@ -1378,6 +1396,7 @@ static SaveVMHandlers savevm_htab_handlers = {
/* pSeries LPAR / sPAPR hardware init */
static void ppc_spapr_init(MachineState *machine)
{
+ sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
@@ -1541,6 +1560,10 @@ static void ppc_spapr_init(MachineState *machine)
/* We always have at least the nvram device on VIO */
spapr_create_nvram(spapr);
+ spapr->dr_phb_enabled = smc->dr_phb_enabled;
+ spapr->dr_cpu_enabled = smc->dr_cpu_enabled;
+ spapr->dr_lmb_enabled = smc->dr_lmb_enabled;
+
/* Set up PCI */
spapr_pci_rtas_init();
@@ -1767,6 +1790,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error
**errp)
static void spapr_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc);
@@ -1778,6 +1802,9 @@ static void spapr_machine_class_init(ObjectClass *oc,
void *data)
mc->default_boot_order = NULL;
mc->kvm_type = spapr_kvm_type;
mc->has_dynamic_sysbus = true;
+ smc->dr_phb_enabled = false;
+ smc->dr_cpu_enabled = false;
+ smc->dr_lmb_enabled = false;
fwc->get_dev_path = spapr_get_fw_dev_path;
nc->nmi_monitor_handler = spapr_nmi;
@@ -1789,6 +1816,7 @@ static const TypeInfo spapr_machine_info = {
.abstract = true,
.instance_size = sizeof(sPAPRMachineState),
.instance_init = spapr_machine_initfn,
+ .class_size = sizeof(sPAPRMachineClass),
.class_init = spapr_machine_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_FW_PATH_PROVIDER },
@@ -1854,11 +1882,15 @@ static const TypeInfo spapr_machine_2_2_info = {
static void spapr_machine_2_3_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
mc->name = "pseries-2.3";
mc->desc = "pSeries Logical Partition (PAPR compliant) v2.3";
mc->alias = "pseries";
mc->is_default = 1;
+ smc->dr_phb_enabled = true;
+ smc->dr_cpu_enabled = true;
+ smc->dr_lmb_enabled = true;
}
static const TypeInfo spapr_machine_2_3_info = {
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 4ab289b..4578433 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -32,6 +32,9 @@ typedef struct sPAPREnvironment {
uint64_t rtc_offset; /* Now used only during incoming migration */
struct PPCTimebase tb;
bool has_graphics;
+ bool dr_phb_enabled; /* hotplug / dynamic-reconfiguration of PHBs */
+ bool dr_cpu_enabled; /* hotplug / dynamic-reconfiguration of CPUs */
+ bool dr_lmb_enabled; /* hotplug / dynamic-reconfiguration of LMBs */
uint32_t check_exception_irq;
Notifier epow_notifier;
--
2.1.0
- [Qemu-devel] [RFC PATCH v2 00/23] CPU and Memory hotplug for PowerPC sPAPR guests, Bharata B Rao, 2015/03/23
- [Qemu-devel] [RFC PATCH v2 02/23] spapr: Add DRC dt entries for CPUs, Bharata B Rao, 2015/03/23
- [Qemu-devel] [RFC PATCH v2 01/23] spapr: enable PHB/CPU/LMB hotplug for pseries-2.3,
Bharata B Rao <=
- [Qemu-devel] [RFC PATCH v2 05/23] spapr: Reorganize CPU dt generation code, Bharata B Rao, 2015/03/23
- [Qemu-devel] [RFC PATCH v2 04/23] spapr: Support ibm, lrdr-capacity device tree property, Bharata B Rao, 2015/03/23
- [Qemu-devel] [RFC PATCH v2 03/23] spapr: Consider max_cpus during xics initialization, Bharata B Rao, 2015/03/23
- [Qemu-devel] [RFC PATCH v2 06/23] spapr: Consolidate cpu init code into a routine, Bharata B Rao, 2015/03/23