Re: [Qemu-devel] Atomic Instructions - comments please

[Peter Maydell]

On 15 December 2014 at 13:28, Paolo Bonzini <address@hidden> wrote:
>
>
> On 15/12/2014 14:23, Peter Maydell wrote:
>> > What are the intended semantics for reads/writes from the outside world?
>> >  Should they cause the ll/sc pair to retry or not?
>> Assuming that by "outside world" you mean "some other CPU in this
>> cluster" [in ARM-speak, some other observer in the same shareability
>> domain]: writes should. Reads should not.
>
> No, I mean from DMA.  Other CPU of course need to abort reads/writes.

Depends whether the DMAing device is in the same shareability domain.
Sufficiently clever DMA devices (probably ones which do cache-coherent
DMA; GPUs spring to mind as a possibility) probably would; plain old
DMA devices not. In practice anybody trying to do DMA onto an ll/sc
mutex location is out of their mind and we can ignore this possibility.

-- PMM