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[Qemu-devel] [PULL 12/33] target-ppc : Add new processor type 440x5wDFPU
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 12/33] target-ppc : Add new processor type 440x5wDFPU |
Date: |
Tue, 4 Nov 2014 20:26:30 +0100 |
From: Pierre Mallard <address@hidden>
This patch add a new processor type 440x5wDFPU for Virtex 5 PPC440
with an external APU FPU in double precision mode
Signed-off-by: Pierre Mallard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/cpu-models.c | 3 +++
target-ppc/translate_init.c | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 41 insertions(+)
diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
index 52ac6ec..3f18996 100644
--- a/target-ppc/cpu-models.c
+++ b/target-ppc/cpu-models.c
@@ -309,6 +309,9 @@
#endif
POWERPC_DEF("440-Xilinx", CPU_POWERPC_440_XILINX, 440x5,
"PowerPC 440 Xilinx 5")
+
+ POWERPC_DEF("440-Xilinx-w-dfpu", CPU_POWERPC_440_XILINX, 440x5wDFPU,
+ "PowerPC 440 Xilinx 5 With a Double Prec. FPU")
#if defined(TODO)
POWERPC_DEF("440A5", CPU_POWERPC_440A5, 440x5,
"PowerPC 440 A5")
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 41bd961..8bfd55d 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3923,6 +3923,44 @@ POWERPC_FAMILY(440x5)(ObjectClass *oc, void *data)
POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK;
}
+POWERPC_FAMILY(440x5wDFPU)(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+ PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+
+ dc->desc = "PowerPC 440x5 with double precision FPU";
+ pcc->init_proc = init_proc_440x5;
+ pcc->check_pow = check_pow_nocheck;
+ pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING |
+ PPC_FLOAT | PPC_FLOAT_FSQRT |
+ PPC_FLOAT_STFIWX |
+ PPC_DCR | PPC_WRTEE | PPC_RFMCI |
+ PPC_CACHE | PPC_CACHE_ICBI |
+ PPC_CACHE_DCBZ | PPC_CACHE_DCBA |
+ PPC_MEM_TLBSYNC | PPC_MFTB |
+ PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC |
+ PPC_440_SPEC;
+ pcc->insns_flags2 = PPC2_FP_CVT_S64;
+ pcc->msr_mask = (1ull << MSR_POW) |
+ (1ull << MSR_CE) |
+ (1ull << MSR_EE) |
+ (1ull << MSR_PR) |
+ (1ull << MSR_FP) |
+ (1ull << MSR_ME) |
+ (1ull << MSR_FE0) |
+ (1ull << MSR_DWE) |
+ (1ull << MSR_DE) |
+ (1ull << MSR_FE1) |
+ (1ull << MSR_IR) |
+ (1ull << MSR_DR);
+ pcc->mmu_model = POWERPC_MMU_BOOKE;
+ pcc->excp_model = POWERPC_EXCP_BOOKE;
+ pcc->bus_model = PPC_FLAGS_INPUT_BookE;
+ pcc->bfd_mach = bfd_mach_ppc_403;
+ pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE |
+ POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK;
+}
+
static void init_proc_460 (CPUPPCState *env)
{
/* Time base */
--
1.8.1.4
- [Qemu-devel] [PULL 2.2 00/33] ppc patch queue 2014-11-04 for 2.2, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 16/33] PPC: Add MPC8XXX gpio controller, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 10/33] PPC: openpic_kvm: Only map first occurence in address space, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 03/33] ppc: fix result of DLMZB when no zero bytes are found, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 01/33] ppc: fix monitor access to CR, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 19/33] spapr_nvram: Enable migration, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 02/33] ppc: use CRF_* in int_helper.c, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 06/33] target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 07/33] target-ppc: Implement IVOR[59] By Default for Book E, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 11/33] target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 12/33] target-ppc : Add new processor type 440x5wDFPU,
Alexander Graf <=
- [Qemu-devel] [PULL 18/33] PPC: E500: Hook up power off GPIO to GPIO controller, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 13/33] hw/pci/ppc4xx_pci.c: Remove unused pci4xx_cfgaddr_read/write/ops, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 04/33] ppc: rename gen_set_cr6_from_fpscr, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 08/33] target-ppc: virtex-ml507 machine type should depend on CONFIG_XILINX, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 17/33] PPC: E500: Instantiate MPC8XXX gpio controller on virt machine, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 14/33] target-ppc: Use macros in opcodes table handling code, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 24/33] sysbus: Make devices spawnable via -device, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 05/33] ppc: compute mask from BI using right shift, Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 22/33] hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*), Alexander Graf, 2014/11/04
- [Qemu-devel] [PULL 15/33] target-ppc: Fix an invalid free in opcode table handling code., Alexander Graf, 2014/11/04