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Re: [Qemu-devel] [PATCH] target-arm: Report a valid L1Ip field in CTR_EL
From: |
Laurent Desnogues |
Subject: |
Re: [Qemu-devel] [PATCH] target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" |
Date: |
Sat, 11 Oct 2014 10:51:52 +0200 |
On Fri, Oct 10, 2014 at 8:46 PM, Peter Maydell <address@hidden> wrote:
> For the CPU type "any" (only used with linux-user) we were reporting
> the L1Ip field as 0b00, which is reserved. Change this field to 0b10
> instead, indicating a VIPT icache as the comment describes.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Thanks,
Laurent
> ---
> target-arm/cpu64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
> index c30f47e..4807ce1 100644
> --- a/target-arm/cpu64.c
> +++ b/target-arm/cpu64.c
> @@ -151,7 +151,7 @@ static void aarch64_any_initfn(Object *obj)
> set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
> set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
> set_feature(&cpu->env, ARM_FEATURE_CRC);
> - cpu->ctr = 0x80030003; /* 32 byte I and D cacheline size, VIPT icache */
> + cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
> cpu->dcz_blocksize = 7; /* 512 bytes */
> }
> #endif
> --
> 1.9.1
>