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[Qemu-devel] [PATCH 16/17] ppc: inline ppc_get_crf/ppc_set_crf when clea
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From: |
Paolo Bonzini |
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Subject: |
[Qemu-devel] [PATCH 16/17] ppc: inline ppc_get_crf/ppc_set_crf when clearer |
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Date: |
Thu, 28 Aug 2014 19:15:12 +0200 |
Signed-off-by: Paolo Bonzini <address@hidden>
---
linux-user/elfload.c | 4 ++--
linux-user/main.c | 5 ++++-
linux-user/signal.c | 8 ++++----
monitor.c | 2 +-
target-ppc/fpu_helper.c | 12 ++++++++++--
target-ppc/gdbstub.c | 8 ++++----
target-ppc/int_helper.c | 31 +++++++++++++++++++++++--------
target-ppc/kvm.c | 10 +++++-----
8 files changed, 53 insertions(+), 27 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 3769ae6..73a3189 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -857,8 +857,8 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs,
const CPUPPCState *en
(*regs)[36] = tswapreg(env->lr);
(*regs)[37] = tswapreg(env->xer);
- for (i = 0; i < ARRAY_SIZE(env->crf); i++) {
- ccr |= ppc_get_crf(env, i) << (32 - ((i + 1) * 4));
+ for (i = 0; i < ARRAY_SIZE(env->cr); i++) {
+ ccr |= env->cr[i] << (31 - i);
}
(*regs)[38] = tswapreg(ccr);
}
diff --git a/linux-user/main.c b/linux-user/main.c
index b403f24..5a0b31f 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -1550,7 +1550,10 @@ static int do_store_exclusive(CPUPPCState *env)
}
}
}
- ppc_set_crf(env, 0, (stored << 1) | xer_so);
+ env->cr[CRF_LT] = 0;
+ env->cr[CRF_GT] = 0;
+ env->cr[CRF_EQ] = stored;
+ env->cr[CRF_SO] = xer_so;
env->reserve_addr = (target_ulong)-1;
}
if (!segv) {
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 4f5d79f..5d7914c 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -4511,8 +4511,8 @@ static void save_user_regs(CPUPPCState *env, struct
target_mcontext *frame,
__put_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]);
__put_user(env->xer, &frame->mc_gregs[TARGET_PT_XER]);
- for (i = 0; i < ARRAY_SIZE(env->crf); i++) {
- ccr |= ppc_get_crf(env, i) << (32 - ((i + 1) * 4));
+ for (i = 0; i < ARRAY_SIZE(env->cr); i++) {
+ ccr |= env->cr[i] << (31 - i);
}
__put_user(ccr, &frame->mc_gregs[TARGET_PT_CCR]);
@@ -4590,8 +4590,8 @@ static void restore_user_regs(CPUPPCState *env,
__get_user(env->xer, &frame->mc_gregs[TARGET_PT_XER]);
__get_user(ccr, &frame->mc_gregs[TARGET_PT_CCR]);
- for (i = 0; i < ARRAY_SIZE(env->crf); i++) {
- ppc_set_crf(env, i, (ccr >> (32 - ((i + 1) * 4))) & 0xf);
+ for (i = 0; i < ARRAY_SIZE(env->cr); i++) {
+ env->cr[i] = (ccr >> (31 - i)) & 1;
}
if (!sig) {
diff --git a/monitor.c b/monitor.c
index 97d72f4..b9def76 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2967,8 +2967,8 @@ static target_long monitor_get_ccr (const struct
MonitorDef *md, int val)
int i;
u = 0;
- for (i = 0; i < 8; i++)
- u |= ppc_get_crf(env, i) << (32 - (4 * (i + 1)));
+ for (i = 0; i < 32; i++)
+ u |= env->cr[i] << (31 - i);
return u;
}
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 9574ebe..2d2239f 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1099,7 +1099,11 @@ void helper_fcmpu(CPUPPCState *env, uint64_t arg1,
uint64_t arg2,
env->fpscr &= ~(0x0F << FPSCR_FPRF);
env->fpscr |= (0x08 << FPSCR_FPRF) >> ret;
- ppc_set_crf(env, crfD, 0x08 >> ret);
+
+ env->cr[crfD * 4 + CRF_LT] = (ret == CRF_LT);
+ env->cr[crfD * 4 + CRF_GT] = (ret == CRF_GT);
+ env->cr[crfD * 4 + CRF_EQ] = (ret == CRF_EQ);
+ env->cr[crfD * 4 + CRF_SO] = (ret == CRF_SO);
if (unlikely(ret == CRF_SO
&& (float64_is_signaling_nan(farg1.d) ||
@@ -1131,7 +1135,11 @@ void helper_fcmpo(CPUPPCState *env, uint64_t arg1,
uint64_t arg2,
env->fpscr &= ~(0x0F << FPSCR_FPRF);
env->fpscr |= (0x08 << FPSCR_FPRF) >> ret;
- ppc_set_crf(env, crfD, 0x08 >> ret);
+
+ env->cr[crfD * 4 + CRF_LT] = (ret == CRF_LT);
+ env->cr[crfD * 4 + CRF_GT] = (ret == CRF_GT);
+ env->cr[crfD * 4 + CRF_EQ] = (ret == CRF_EQ);
+ env->cr[crfD * 4 + CRF_SO] = (ret == CRF_SO);
if (unlikely(ret == CRF_SO)) {
if (float64_is_signaling_nan(farg1.d) ||
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index e0f340c..4457f81 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -138,8 +138,8 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t
*mem_buf, int n)
{
uint32_t cr = 0;
int i;
- for (i = 0; i < ARRAY_SIZE(env->crf); i++) {
- cr |= ppc_get_crf(env, i) << (32 - ((i + 1) * 4));
+ for (i = 0; i < ARRAY_SIZE(env->cr); i++) {
+ cr |= env->cr[i] << (31 - i);
}
gdb_get_reg32(mem_buf, cr);
break;
@@ -246,8 +246,8 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t
*mem_buf, int n)
{
uint32_t cr = ldl_p(mem_buf);
int i;
- for (i = 0; i < ARRAY_SIZE(env->crf); i++) {
- ppc_set_crf(env, i, (cr >> (32 - ((i + 1) * 4))) & 0xF);
+ for (i = 0; i < ARRAY_SIZE(env->cr); i++) {
+ env->cr[i] = (cr >> (31 - i)) & 1;
}
break;
}
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index d3ace6a..4b8dbcb 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -322,8 +322,8 @@ target_ulong helper_mfocrf(CPUPPCState *env)
{
uint32_t cr = 0;
int i;
- for (i = 0; i < 8; i++) {
- cr |= ppc_get_crf(env, i) << (32 - (i + 1) * 4);
+ for (i = 0; i < 32; i++) {
+ cr |= env->cr[i] << (31 - i);
}
return cr;
}
@@ -679,7 +679,10 @@ VCF(sx, int32_to_float32, s32)
none |= result; \
} \
if (record) { \
- ppc_set_crf(env, 6, ((all != 0) << 3) | ((none == 0) << 1)); \
+ env->cr[24 + CRF_LT] = (all != 0); \
+ env->cr[24 + CRF_GT] = 0; \
+ env->cr[24 + CRF_EQ] = (none == 0); \
+ env->cr[24 + CRF_SO] = 0; \
} \
}
#define VCMP(suffix, compare, element) \
@@ -725,7 +728,10 @@ VCMP(gtsd, >, s64)
none |= result; \
} \
if (record) { \
- ppc_set_crf(env, 6, ((all != 0) << 3) | ((none == 0) << 1)); \
+ env->cr[24 + CRF_LT] = (all != 0); \
+ env->cr[24 + CRF_GT] = 0; \
+ env->cr[24 + CRF_EQ] = (none == 0); \
+ env->cr[24 + CRF_SO] = 0; \
} \
}
#define VCMPFP(suffix, compare, order) \
@@ -759,7 +765,10 @@ static inline void vcmpbfp_internal(CPUPPCState *env,
ppc_avr_t *r,
}
}
if (record) {
- ppc_set_crf(env, 6, (all_in == 0) << 1);
+ env->cr[24 + CRF_LT] = 0;
+ env->cr[24 + CRF_GT] = 0;
+ env->cr[24 + CRF_EQ] = (all_in == 0);
+ env->cr[24 + CRF_SO] = 0;
}
}
@@ -2580,7 +2589,9 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong
high,
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
if ((high & mask) == 0) {
if (update_Rc) {
- ppc_set_crf(env, 0, 0x4);
+ env->cr[CRF_LT] = 0;
+ env->cr[CRF_GT] = 1;
+ env->cr[CRF_EQ] = 0;
}
goto done;
}
@@ -2589,7 +2600,9 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong
high,
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
if ((low & mask) == 0) {
if (update_Rc) {
- ppc_set_crf(env, 0, 0x8);
+ env->cr[CRF_LT] = 1;
+ env->cr[CRF_GT] = 0;
+ env->cr[CRF_EQ] = 0;
}
goto done;
}
@@ -2597,7 +2610,9 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong
high,
}
i = 8;
if (update_Rc) {
- ppc_set_crf(env, 0, 0x2);
+ env->cr[CRF_LT] = 0;
+ env->cr[CRF_GT] = 0;
+ env->cr[CRF_EQ] = 1;
}
done:
env->xer = (env->xer & ~0x7F) | i;
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index a4eca17..f3feef7 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -794,8 +794,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
regs.gpr[i] = env->gpr[i];
regs.cr = 0;
- for (i = 0; i < 8; i++) {
- regs.cr |= ppc_get_crf(env, i) << (4 * (7 - i));
+ for (i = 0; i < 32; i++) {
+ regs.cr |= env->cr[i] << (31 - i);
}
ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s);
@@ -913,9 +913,9 @@ int kvm_arch_get_registers(CPUState *cs)
return ret;
cr = regs.cr;
- for (i = 7; i >= 0; i--) {
- ppc_set_crf(env->cr[i], cr & 15);
- cr >>= 4;
+ for (i = 31; i >= 0; i--) {
+ env->cr[i] = cr & 1;
+ cr >>= 1;
}
env->ctr = regs.ctr;
--
1.8.3.1
- [Qemu-devel] [PATCH 05/17] ppc: use CRF_* in fpu_helper.c, (continued)
- [Qemu-devel] [PATCH 05/17] ppc: use CRF_* in fpu_helper.c, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 06/17] ppc: use CRF_* in int_helper.c, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 07/17] ppc: fix result of DLMZB when no zero bytes are found, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 08/17] ppc: introduce helpers for mfocrf/mtocrf, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 09/17] ppc: reorganize gen_compute_fprf, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 10/17] ppc: introduce gen_op_mfcr/gen_op_mtcr, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 11/17] ppc: rename gen_set_cr6_from_fpscr, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 13/17] ppc: compute mask from BI using right shift, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 14/17] ppc: introduce ppc_get_crf and ppc_set_crf, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 15/17] ppc: store CR registers in 32 1-bit registers, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 16/17] ppc: inline ppc_get_crf/ppc_set_crf when clearer,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 17/17] ppc: dump all 32 CR bits, Paolo Bonzini, 2014/08/28
- [Qemu-devel] [PATCH 12/17] ppc: use movcond for isel, Paolo Bonzini, 2014/08/28
- Re: [Qemu-devel] [RFT/RFH PATCH 00/16] PPC speedup patches for TCG, Tom Musta, 2014/08/28