[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state |
Date: |
Mon, 30 Dec 2013 06:58:52 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
On 12/28/2013 01:49 PM, Peter Maydell wrote:
> + uint64_t vlo = float64_val(env->vfp.regs[i * 2]);
> + uint64_t vhi = float64_val(env->vfp.regs[(i * 2) + 1]);
> + cpu_fprintf(f, "q%02d.0=%016" PRIx64 ":%016" PRIx64 " ",
> + i, vlo, vhi);
Why print them lo:hi instead of, what would seem to me, the more natural hi:lo.
And what's that .0 qualifier doing on the end of an integer print field?
r~
- [Qemu-devel] [PATCH 00/10] A64 decoder patchset 5: most floating point, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 07/10] target-arm: A64: Add support for floating point compare, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state, Peter Maydell, 2013/12/28
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state,
Richard Henderson <=
- [Qemu-devel] [PATCH 09/10] target-arm: A64: Add support for floating point cond select, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 08/10] target-arm: A64: Add support for floating point conditional compare, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum, Peter Maydell, 2013/12/28
- [Qemu-devel] [PATCH 02/10] target-arm: A64: Fix vector register access on bigendian hosts, Peter Maydell, 2013/12/28