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Re: [Qemu-devel] [PATCH 11/21] target-arm: Update generic cpreg code for
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH 11/21] target-arm: Update generic cpreg code for AArch64 |
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Date: |
Fri, 20 Dec 2013 16:43:23 +0000 |
On 17 December 2013 15:12, Peter Maydell <address@hidden> wrote:
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP0_MASK, KVM_REG_ARM64_SYSREG_OP0_MASK)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP0_SHIFT, KVM_REG_ARM64_SYREG_OP0_SHIFT)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP1_MASK, KVM_REG_ARM64_SYSREG_OP1_MASK)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP1_SHIFT, KVM_REG_ARM64_SYREG_OP1_SHIFT)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRN_MASK, KVM_REG_ARM64_SYSREG_CRN_MASK)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRN_SHIFT, KVM_REG_ARM64_SYREG_CRN_SHIFT)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRM_MASK, KVM_REG_ARM64_SYSREG_CRM_MASK)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRM_SHIFT, KVM_REG_ARM64_SYREG_CRM_SHIFT)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP2_MASK, KVM_REG_ARM64_SYSREG_OP2_MASK)
> +MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP2_SHIFT, KVM_REG_ARM64_SYREG_OP2_SHIFT)
Spot the typo which breaks compilation on aarch64 hosts :-)
-- PMM
- [Qemu-devel] [PATCH 12/21] target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder, (continued)
Re: [Qemu-devel] [PATCH 11/21] target-arm: Update generic cpreg code for AArch64, Peter Crosthwaite, 2013/12/19
Re: [Qemu-devel] [PATCH 11/21] target-arm: Update generic cpreg code for AArch64,
Peter Maydell <=
[Qemu-devel] [PATCH 17/21] target-arm: A64: add support for conditional compare insns, Peter Maydell, 2013/12/17
Re: [Qemu-devel] [PATCH 17/21] target-arm: A64: add support for conditional compare insns, Peter Maydell, 2013/12/20
Re: [Qemu-devel] [PATCH 17/21] target-arm: A64: add support for conditional compare insns, Richard Henderson, 2013/12/20
[Qemu-devel] [PATCH 01/21] target-arm: A64: add support for ld/st pair, Peter Maydell, 2013/12/17