[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR |
Date: |
Fri, 06 Dec 2013 11:47:43 +1300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 12/06/2013 10:51 AM, Peter Maydell wrote:
> From: Alexander Graf <address@hidden>
>
> This patch adds emulation support for the EXTR instruction.
>
> Signed-off-by: Alexander Graf <address@hidden>
>
> [claudio: adapted for new decoder, removed a few temporaries,
> fixed the 32bit bug, added checks for more
> unallocated cases]
>
> Signed-off-by: Claudio Fontana <address@hidden>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target-arm/translate-a64.c | 48
> ++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 46 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
> + tcg_rm = read_cpu_reg(s, rm, sf);
> + tcg_rn = read_cpu_reg(s, rn, sf);
> + tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
> + tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
> + tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
> + if (!sf) {
> + tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
> + }
OPTME: If Rm==Rn, this is a rotate.
r~
- [Qemu-devel] [PATCH 00/13] target-arm: A64 decoder set 2: misc logic and bit ops, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH 08/13] target-arm: A64: add support for 1-src RBIT insn, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH 10/13] target-arm: A64: add support for bitfield insns, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH 13/13] target-arm: A64: add support for logical (immediate) insns, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR, Peter Maydell, 2013/12/05
- Re: [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR,
Richard Henderson <=
- [Qemu-devel] [PATCH 01/13] target-arm: A64: add support for conditional select, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 11/13] host-utils: add clrsb32/64 - count leading redundant sign bits, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 07/13] target-arm: A64: add support for 1-src data processing and CLZ, Peter Maydell, 2013/12/05