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Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v4)
From: |
Marcelo Tosatti |
Subject: |
Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v4) |
Date: |
Wed, 6 Nov 2013 20:24:15 -0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Thu, Nov 07, 2013 at 12:15:59AM +0200, Michael S. Tsirkin wrote:
> On Wed, Nov 06, 2013 at 07:53:51PM -0200, Marcelo Tosatti wrote:
> > On Wed, Nov 06, 2013 at 11:40:34PM +0200, Michael S. Tsirkin wrote:
> > > On Wed, Nov 06, 2013 at 07:31:19PM -0200, Marcelo Tosatti wrote:
> > > >
> > > > v2: condition enablement of new mapping to new machine types (Paolo)
> > > > v3: fix changelog
> > > > v4: rebase
> > > >
> > > > -----
> > > >
> > > >
> > > > Align guest physical address and host physical address
> > > > beyond guest 4GB on a 1GB boundary.
> > > >
> > > > Otherwise 1GB TLBs cannot be cached for the range.
> > > >
> > > > Signed-off-by: Marcelo Tosatti <address@hidden>
> > >
> > > Um. This will conflict with:
> > > pc: map PCI address space as catchall region for not mapped addresses
> > >
> > > I think we really should stop using the hacked hole thing
> > > and just use priorities like that patch does.
> >
> > Sorry hacked in what way?
> > This patch is necessary to enable 1GB hugepages beyond 4GB of RAM on the
> > current machine types.
>
>
> Sorry if I wasn't clear. when I said "hacked" I was talking about the
> pci hole concept generally in upstream qemu, not about your patch.
>
> Its hacked because there's no "pci hole" on PIIX.
> pci hole is where pci was hiding some ram behind it
> on some systems. AFAIK this is not what is happens on piix though.
> What happens really is that everything not covered by RAM memory is PCI.
>
> We implemented this using two aliases of RAM but
> the natural thing is really just making PCI lower
> priority than RAM and let it overlap.
>
> > > Do you agree? If yes I'm afraid your patch will have to be
> > > rebased on top of that yet again, sorry to give you a
> > > run-around like that :(
> >
> > I don't see what exactly is the suggestion (or why the proposed
> > patch should conflict with "pc: map PCI address space as catchall region
> > for not mapped addresses").
>
> It seemed to me that they will conflict but it's after midnight
> so maybe I'm confused.
> You are saying you apply yours on top and there's no conflict?
> In that case I'll recheck, sorry.
No conflict between "pc: map PCI address space as catchall region"
and the proposed patch.
> > > Also - do you think this is 1.7 material?
> >
> > No. Paolo mentioned you have a tree with 1.8 material, correct?
>
> Yes
>
> git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git pci
- [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v2), Marcelo Tosatti, 2013/11/05
- [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v4), Marcelo Tosatti, 2013/11/06
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v4), Igor Mammedov, 2013/11/07
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v4), Marcelo Tosatti, 2013/11/07
- [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v5), Marcelo Tosatti, 2013/11/10
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v5), Igor Mammedov, 2013/11/12
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v5), Marcelo Tosatti, 2013/11/12
- [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v6), Marcelo Tosatti, 2013/11/12
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v6), Igor Mammedov, 2013/11/13
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v6), Paolo Bonzini, 2013/11/13
- Message not available
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v6), Marcelo Tosatti, 2013/11/13
- Re: [Qemu-devel] i386: pc: align gpa<->hpa on 1GB boundary (v6), Paolo Bonzini, 2013/11/13