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[Qemu-devel] [PATCH 4/5] hw: arm_gic: Support setting/getting binary poi
From: |
Christoffer Dall |
Subject: |
[Qemu-devel] [PATCH 4/5] hw: arm_gic: Support setting/getting binary point reg |
Date: |
Fri, 23 Aug 2013 13:10:23 -0700 |
Add a binary_point field to the gic emulation structure and support
setting/getting this register now when we have it. We don't actually
support interrupt grouping yet, oh well.
Signed-off-by: Christoffer Dall <address@hidden>
---
hw/intc/arm_gic.c | 5 ++---
hw/intc/arm_gic_common.c | 1 +
hw/intc/gic_internal.h | 3 +++
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 4da534f..cb2004d 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -568,8 +568,7 @@ static uint32_t gic_cpu_read(GICState *s, int cpu, int
offset)
case 0x04: /* Priority mask */
return s->priority_mask[cpu];
case 0x08: /* Binary Point */
- /* ??? Not implemented. */
- return 0;
+ return s->binary_point[0][cpu];
case 0x0c: /* Acknowledge */
value = gic_acknowledge_irq(s, cpu);
value |= (GIC_SGI_SRC(value, cpu) & 0x7) << 10;
@@ -596,7 +595,7 @@ static void gic_cpu_write(GICState *s, int cpu, int offset,
uint32_t value)
s->priority_mask[cpu] = (value & 0xff);
break;
case 0x08: /* Binary Point */
- /* ??? Not implemented. */
+ s->binary_point[0][cpu] = (value & 0x7);
break;
case 0x10: /* End Of Interrupt */
return gic_complete_irq(s, cpu, value & 0x3ff);
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index 7a1c9e5..a50ded2 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -76,6 +76,7 @@ static const VMStateDescription vmstate_gic = {
VMSTATE_UINT16_ARRAY(running_irq, GICState, NCPU),
VMSTATE_UINT16_ARRAY(running_priority, GICState, NCPU),
VMSTATE_UINT16_ARRAY(current_pending, GICState, NCPU),
+ VMSTATE_UINT8_2DARRAY(binary_point, GICState, 2, NCPU),
VMSTATE_END_OF_LIST()
}
};
diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h
index 6f04885..424a41f 100644
--- a/hw/intc/gic_internal.h
+++ b/hw/intc/gic_internal.h
@@ -98,6 +98,9 @@ typedef struct GICState {
uint16_t running_priority[NCPU];
uint16_t current_pending[NCPU];
+ /* these registers are mainly used for save/restore of KVM state */
+ uint8_t binary_point[2][NCPU]; /* [0]: group 0, [1]: group 1 */
+
uint32_t num_cpu;
MemoryRegion iomem; /* Distributor */
--
1.7.10.4
- [Qemu-devel] [PATCH 0/5] Support arm-gic-kvm save/restore, Christoffer Dall, 2013/08/23
- [Qemu-devel] [PATCH 1/5] hw: arm_gic: Fix gic_set_irq handling, Christoffer Dall, 2013/08/23
- [Qemu-devel] [PATCH 2/5] hw: arm_gic: Introduce GIC_SET_PRIORITY macro, Christoffer Dall, 2013/08/23
- [Qemu-devel] [PATCH 3/5] hw: arm_gic: Keep track of SGI sources, Christoffer Dall, 2013/08/23
- [Qemu-devel] [PATCH 4/5] hw: arm_gic: Support setting/getting binary point reg,
Christoffer Dall <=
- [Qemu-devel] [PATCH 5/5] hw: arm_gic_kvm: Add KVM VGIC save/restore logic, Christoffer Dall, 2013/08/23
- Re: [Qemu-devel] [PATCH 0/5] Support arm-gic-kvm save/restore, Alexander Graf, 2013/08/25