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Re: [Qemu-devel] [PATCH 5/7] target-mips:Support for Cavium specific ins
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH 5/7] target-mips:Support for Cavium specific instructions |
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Date: |
Tue, 27 Sep 2011 08:14:31 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:6.0.2) Gecko/20110906 Thunderbird/6.0.2 |
On 09/26/2011 09:17 PM, address@hidden wrote:
> + switch (opc) {
> + case OPC_SEQI:
> + tcg_gen_setcondi_tl(TCG_COND_LT, cpu_gpr[rt], t0, 1);
> + opn = "seqi";
> + break;
> + case OPC_SNEI:
> + tcg_gen_setcondi_tl(TCG_COND_GT, cpu_gpr[rt], t0, 0);
> + opn = "snei";
> + break;
> + }
You didn't change anything wrt my comments from the last round.
r~
- [Qemu-devel] [PATCH 0/7] MIPS64 user mode emulation in QEMU with Cavium specific instruction support, khansa, 2011/09/27
- [Qemu-devel] [PATCH 1/7] linux-user:Support for MIPS64 user mode emulation in QEMU, khansa, 2011/09/27
- [Qemu-devel] [PATCH 2/7] target-mips:enabling of 64 bit user mode and floating point operations, khansa, 2011/09/27
- [Qemu-devel] [PATCH 3/7] linux-user:Signal handling for MIPS64, khansa, 2011/09/27
- [Qemu-devel] [PATCH 4/7] target-mips:Octeon cpu definition, khansa, 2011/09/27
- [Qemu-devel] [PATCH 5/7] target-mips:Support for Cavium specific instructions, khansa, 2011/09/27
- [Qemu-devel] [PATCH 6/7] Addition of Cavium instructions in disassembler, khansa, 2011/09/27