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[Qemu-devel] [PATCH 01/17] e1000: switch to symbolic names for pci regis
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PATCH 01/17] e1000: switch to symbolic names for pci registers |
Date: |
Thu, 10 Dec 2009 20:09:46 +0200 |
User-agent: |
Mutt/1.5.19 (2009-01-05) |
No functional changes. I verified that the generated
object binary does not change.
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/e1000.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index ad7a267..300b11d 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1089,12 +1089,15 @@ static int pci_e1000_init(PCIDevice *pci_dev)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, E1000_DEVID);
- *(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010);
- pci_conf[0x08] = 0x03;
+ /* TODO: we have no capabilities, so why is this bit set? */
+ pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST);
+ pci_conf[PCI_REVISION_ID] = 0x03;
pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
- pci_conf[0x0c] = 0x10;
+ /* TODO: RST# value should be 0, PCI spec 6.2.4 */
+ pci_conf[PCI_CACHE_LINE_SIZE] = 0x10;
- pci_conf[0x3d] = 1; // interrupt pin 0
+ /* TODO: RST# value should be 0 if programmable, PCI spec 6.2.4 */
+ pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
d->mmio_index = cpu_register_io_memory(e1000_mmio_read,
e1000_mmio_write, d);
--
1.6.6.rc1.43.gf55cc
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