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[Qemu-devel] [PATCH] sparc64 support TSB related MMU registers
From: |
Igor Kovalenko |
Subject: |
[Qemu-devel] [PATCH] sparc64 support TSB related MMU registers |
Date: |
Sat, 25 Apr 2009 18:17:25 +0400 |
Posting updated patch to the list...
>>> On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <address@hidden> wrote:
>>> >
>>> > Nice, though I didn't notice any visible improvement in my tests.
>>>
>>> This early in boot process there is not much to output; and I test
>>> recent kernel which may use different startup sequence.
>>> I modified openbios cif handler to output arguments and I now can see
>>> visible difference.
>>>
>>>
>>> >
>>> > About the patch, there are a few problems:
>>> > - it breaks Sparc32
>>>
>>> You mean it stops working?
>>
>> Does not even build.
Fixed now.
>>> > - commented out code is ugly
>>> > - if and else should be on the same line as '{' or '}'
>>> > - long lines should be wrapped
>>> > - in the line:
>>> > + return (((tag_access_register & 0x1fff)<<48)|(tag_access_register
>>> >> 22));
>>> > there should be white space between ) and << and 48.
>>> >
>>>
>>
>> Also the ")|(" in between is crowded.
>>
>> Maybe the coding style does not describe this well enough.
BTW Supplying indent template would be great.
Please see the updated patch qemu-sparc64-tsb-asi-2.patch attached.
--
Kind regards,
Igor V. Kovalenko
qemu-sparc64-tsb-asi-2.patch
Description: Binary data
Re: [Qemu-devel] [PATCH] sparc64 support TSB related MMU registers, Igor Kovalenko, 2009/04/26