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[Qemu-commits] [qemu/qemu] eec2f9: hw/net:ftgmac100: update memory regio
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From: |
Richard Henderson |
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Subject: |
[Qemu-commits] [qemu/qemu] eec2f9: hw/net:ftgmac100: update memory region size to 64KB |
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Date: |
Tue, 09 Jul 2024 09:57:01 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: eec2f9cc69ba68c09dfba6812f58e550c1e83d68
https://github.com/qemu/qemu/commit/eec2f9cc69ba68c09dfba6812f58e550c1e83d68
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/net/ftgmac100.c
M include/hw/net/ftgmac100.h
Log Message:
-----------
hw/net:ftgmac100: update memory region size to 64KB
According to the datasheet of ASPEED SOCs,
one MAC controller owns 128KB of register space for AST2500.
However, one MAC controller only owns 64KB of register space for AST2600
and AST2700. It set the memory region size 128KB and it occupied another
controllers Address Spaces.
Update one MAC controller memory region size to 0x1000
because AST2500 did not use register spaces over than 64KB.
Introduce a new container region size to 0x1000 and its range
is from 0 to 0xfff. This container is mapped a sub region
for the current set of register.
This sub region range is from 0 to 0xff.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: 0b51fd0f99f09df4560c267922cabdbc67198ae8
https://github.com/qemu/qemu/commit/0b51fd0f99f09df4560c267922cabdbc67198ae8
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/net/ftgmac100.c
M include/hw/net/ftgmac100.h
Log Message:
-----------
hw/net:ftgmac100: update ring base address to 64 bits
Update TX and RX ring base address data type to uint64_t for
64 bits dram address DMA support.
Both "Normal Priority Transmit Ring Base Address Register(0x20)" and
"Receive Ring Base Address Register (0x24)" are used for saving the
low part physical address of descriptor manager.
Therefore, changes to set TX and RX descriptor manager address bits [31:0]
in ftgmac100_read and ftgmac100_write functions.
Incrementing the version of vmstate to 2.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: 578c6e9ed5d0484da5b478f932c420ecc4f751f6
https://github.com/qemu/qemu/commit/578c6e9ed5d0484da5b478f932c420ecc4f751f6
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/net/ftgmac100.c
M include/hw/net/ftgmac100.h
Log Message:
-----------
hw/net:ftgmac100: introduce TX and RX ring base address high registers to
support 64 bits
ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.
It have "Normal Priority Transmit Ring Base Address Register High(0x17C)",
"High Priority Transmit Ring Base Address Register High(0x184)" and
"Receive Ring Base Address Register High(0x18C)" to save the high part physical
address of descriptor manager.
Ex: TX descriptor manager address [34:0]
The "Normal Priority Transmit Ring Base Address Register High(0x17C)"
bits [2:0] which corresponds the bits [34:32] of the 64 bits address of
the TX ring buffer address.
The "Normal Priority Transmit Ring Base Address Register(0x20)" bits [31:0]
which corresponds the bits [31:0] of the 64 bits address
of the TX ring buffer address.
Introduce a new sub region which size is 0x100 for the set of new registers
and map it at 0x100 in the container region.
This sub region range is from 0x100 to 0x1ff.
Introduce a new property and object attribute to activate the region for new
registers.
Introduce a new memop handlers for the new register read and write.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: 2095468d2cce73d1d3825cb953bd5114fffe73c8
https://github.com/qemu/qemu/commit/2095468d2cce73d1d3825cb953bd5114fffe73c8
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/net/ftgmac100.c
Log Message:
-----------
hw/net:ftgmac100: update TX and RX packet buffers address to 64 bits
ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.
It have "TXDES 2" and "RXDES 2" to save the high part
physical address of packet buffer.
Ex: TX packet buffer address [34:0]
The "TXDES 2" bits [18:16] which corresponds the bits [34:32]
of the 64 bits address of the TX packet buffer address
and "TXDES 3" bits [31:0] which corresponds the bits [31:0]
of the 64 bits address of the TX packet buffer address.
Update TX and RX packet buffers address type to
64 bits for dram 64 bits address DMA support.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: f2146bc6cb98e3e6d5749a6a974a53a1a1a754fc
https://github.com/qemu/qemu/commit/f2146bc6cb98e3e6d5749a6a974a53a1a1a754fc
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/arm/aspeed_ast27x0.c
Log Message:
-----------
aspeed/soc: set dma64 property for AST2700 ftgmac100
ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.
Set dma64 property for ftgmac100 model to support
64bits dram address DMA.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: 61f93767751341e29445c052d4db53791aeab035
https://github.com/qemu/qemu/commit/61f93767751341e29445c052d4db53791aeab035
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/block/m25p80.c
Log Message:
-----------
hw/block: m25p80: support quad mode for w25q01jvq
According to the w25q01jv datasheet at page 16,
it is required to set QE bit in "Status Register 2".
Besides, users are able to utilize "Write Status Register 1(0x01)"
command to set QE bit in "Status Register 2" and
utilize "Read Status Register 2(0x35)" command to get the QE bit status.
To support quad mode for w25q01jvq, update collecting data needed
2 bytes for WRSR command in decode_new_cmd function and
verify QE bit at the second byte of collecting data bit 2
in complete_collecting_data.
Update RDCR_EQIO command to set bit 2 of return data
if quad mode enable in decode_new_cmd.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: d8b76d9ab1860d116375b657605312e5ad493fdd
https://github.com/qemu/qemu/commit/d8b76d9ab1860d116375b657605312e5ad493fdd
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M tests/avocado/machine_aspeed.py
Log Message:
-----------
machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for AST2700
Update test case to test ASPEED OpenBMC SDK v09.02 for AST2700.
ASPEED fixed TX mask issue from linux/drivers/ftgmac100.c.
It is required to use ASPEED OpenBMC SDK since v09.02
for AST2700 QEMU network testing.
A test image is downloaded from the ASPEED Forked OpenBMC GitHub
release repository :
https://github.com/AspeedTech-BMC/openbmc/releases/
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: d847ea7cfc6321e2519f587d4077428d90557178
https://github.com/qemu/qemu/commit/d847ea7cfc6321e2519f587d4077428d90557178
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M tests/avocado/machine_aspeed.py
Log Message:
-----------
machine_aspeed.py: update to test network for AST2700
Update test case to test network connection via SSH.
Test command:
```
cd build
pyvenv/bin/avocado run
../qemu/tests/avocado/machine_aspeed.py:AST2x00MachineSDK.test_aarch64_ast2700_evb_sdk_v09_02
```
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Commit: 37baedf8e8a78cf799956447e40da79b967882bb
https://github.com/qemu/qemu/commit/37baedf8e8a78cf799956447e40da79b967882bb
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/virtio/virtio-iommu.c
Log Message:
-----------
virtio-iommu: Fix error handling in virtio_iommu_set_host_iova_ranges()
In case no IOMMUPciBus/IOMMUDevice are found we need to properly
set the error handle and return.
Fixes : Coverity CID 1549006
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Fixes: cf2647a76e ("virtio-iommu: Compute host reserved regions")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 3966bca539967a05b3256549eb00f9488c2790e6
https://github.com/qemu/qemu/commit/3966bca539967a05b3256549eb00f9488c2790e6
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/container-base.c
M hw/vfio/container.c
M hw/vfio/iommufd.c
M include/hw/vfio/vfio-container-base.h
Log Message:
-----------
vfio-container-base: Introduce vfio_container_get_iova_ranges() helper
Introduce vfio_container_get_iova_ranges() to retrieve the usable
IOVA regions of the base container and use it in the Host IOMMU
device implementations of get_iova_ranges() callback.
We also fix a UAF bug as the list was shallow copied while
g_list_free_full() was used both on the single call site, in
virtio_iommu_set_iommu_device() but also in
vfio_container_instance_finalize(). Instead use g_list_copy_deep.
Fixes: cf2647a76e ("virtio-iommu: Compute host reserved regions")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Suggested-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d59ca1ca17480fc776aa02bf536ca3c87dc79323
https://github.com/qemu/qemu/commit/d59ca1ca17480fc776aa02bf536ca3c87dc79323
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/container.c
M hw/vfio/iommufd.c
M hw/virtio/virtio-iommu.c
M include/sysemu/host_iommu_device.h
Log Message:
-----------
HostIOMMUDevice : remove Error handle from get_iova_ranges callback
The error handle argument is not used anywhere. let's remove it.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 8fe0ebe15d7775be72b1aaceb7405b68d3ec6368
https://github.com/qemu/qemu/commit/8fe0ebe15d7775be72b1aaceb7405b68d3ec6368
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/container.c
M hw/vfio/iommufd.c
M include/hw/vfio/vfio-container-base.h
M include/sysemu/host_iommu_device.h
Log Message:
-----------
HostIOMMUDevice: Introduce get_page_size_mask() callback
This callback will be used to retrieve the page size mask supported
along a given Host IOMMU device.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d7c8c95fbca2e07d11b98fb1b191d7194d084c7e
https://github.com/qemu/qemu/commit/d7c8c95fbca2e07d11b98fb1b191d7194d084c7e
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/virtio/trace-events
M hw/virtio/virtio-iommu.c
Log Message:
-----------
virtio-iommu : Retrieve page size mask on virtio_iommu_set_iommu_device()
Retrieve the Host IOMMU Device page size mask when this latter is set.
This allows to get the information much sooner than when relying on
IOMMU MR set_page_size_mask() call, whcih happens when the IOMMU MR
gets enabled. We introduce check_page_size_mask() helper whose code
is inherited from current virtio_iommu_set_page_size_mask()
implementation. This callback will be removed in a subsequent patch.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 2457343d05a168963b52ab6d5c2932dd29b93f46
https://github.com/qemu/qemu/commit/2457343d05a168963b52ab6d5c2932dd29b93f46
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/common.c
M hw/virtio/trace-events
M hw/virtio/virtio-iommu.c
M include/exec/memory.h
M system/memory.c
Log Message:
-----------
memory: remove IOMMU MR iommu_set_page_size_mask() callback
Everything is now in place to use the Host IOMMU Device callbacks
to retrieve the page size mask usable with a given assigned device.
This new method brings the advantage to pass the info much earlier
to the virtual IOMMU and before the IOMMU MR gets enabled. So let's
remove the call to memory_region_iommu_set_page_size_mask in
vfio common.c and remove the single implementation of the IOMMU MR
callback in the virtio-iommu.c
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 956b30b9cf856470612e8d2c2c4985fb7e40a970
https://github.com/qemu/qemu/commit/956b30b9cf856470612e8d2c2c4985fb7e40a970
Author: Eric Auger <eric.auger@redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/virtio/virtio-iommu.c
Log Message:
-----------
virtio-iommu: Revert transient enablement of IOMMU MR in bypass mode
In 94df5b2180d6 ("virtio-iommu: Fix 64kB host page size VFIO device
assignment"), in case of bypass mode, we transiently enabled the
IOMMU MR to allow the set_page_size_mask() to be called and pass
information about the page size mask constraint of cold plugged
VFIO devices. Now we do not use the IOMMU MR callback anymore, we
can just get rid of this hack.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f15da599a1c5326e105425a74d2fb004a2a2649e
https://github.com/qemu/qemu/commit/f15da599a1c5326e105425a74d2fb004a2a2649e
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/display.c
Log Message:
-----------
vfio/display: Fix potential memleak of edid info
EDID related device region info is leaked in vfio_display_edid_init()
error path and VFIODisplay destroying path.
Fixes: 08479114b0de ("vfio/display: add edid support.")
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Commit: 83d90192026eaded6319a6d27466ad7d606a27e0
https://github.com/qemu/qemu/commit/83d90192026eaded6319a6d27466ad7d606a27e0
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/display.c
Log Message:
-----------
vfio/display: Fix vfio_display_edid_init() error path
vfio_display_edid_init() can fail for many reasons and return silently.
It would be good to report the error.
Old mdev driver may not support vfio edid region and we allow to go
through in this case.
vfio_display_edid_update() isn't changed because it can be called at
runtime when UI changes (i.e. window resize).
Fixes: 08479114b0de ("vfio/display: add edid support.")
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Commit: 4a3eceb403bd7665095245b5fa0bda81099dc803
https://github.com/qemu/qemu/commit/4a3eceb403bd7665095245b5fa0bda81099dc803
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/vfio/common.c
M hw/vfio/container-base.c
M hw/vfio/container.c
M hw/vfio/display.c
M hw/vfio/iommufd.c
M hw/virtio/trace-events
M hw/virtio/virtio-iommu.c
M include/exec/memory.h
M include/hw/vfio/vfio-container-base.h
M include/sysemu/host_iommu_device.h
M system/memory.c
Log Message:
-----------
Merge tag 'pull-vfio-20240709' of https://github.com/legoater/qemu into
staging
vfio queue:
* Fixes on VFIO display
* VIRTIO-IOMMU/HostIOMMUDevice: Fixes and page size mask rework
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* tag 'pull-vfio-20240709' of https://github.com/legoater/qemu:
vfio/display: Fix vfio_display_edid_init() error path
vfio/display: Fix potential memleak of edid info
virtio-iommu: Revert transient enablement of IOMMU MR in bypass mode
memory: remove IOMMU MR iommu_set_page_size_mask() callback
virtio-iommu : Retrieve page size mask on virtio_iommu_set_iommu_device()
HostIOMMUDevice: Introduce get_page_size_mask() callback
HostIOMMUDevice : remove Error handle from get_iova_ranges callback
vfio-container-base: Introduce vfio_container_get_iova_ranges() helper
virtio-iommu: Fix error handling in virtio_iommu_set_host_iova_ranges()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 59084feb256c617063e0dbe7e64821ae8852d7cf
https://github.com/qemu/qemu/commit/59084feb256c617063e0dbe7e64821ae8852d7cf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M hw/arm/aspeed_ast27x0.c
M hw/block/m25p80.c
M hw/net/ftgmac100.c
M include/hw/net/ftgmac100.h
M tests/avocado/machine_aspeed.py
Log Message:
-----------
Merge tag 'pull-aspeed-20240709' of https://github.com/legoater/qemu into
staging
aspeed queue:
* support AST2700 network
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# fSBqxL4LD6K4WKL1Hg9959cBcm5zWgPXk7znus4E/TZuUTdSHaPC7clESIcYqWPS
# veEAppmHneO4cdmK1m+Gv4gpWD/adS4ZfV7O+C3z149ms0gL4JrK6QndPdE5QuIW
# u47PhIT3oIM0WznnMusoCndFxs6Gl/GBkzdxW0gdoJKBRfymbsroWeZamAWTznbV
# mL8Td8bEP/NcV40cm1PtpZyl7j0MzxcKDUHKv9ioQTXLUpkl5LSsIGmd1m78WRlE
# J6bUJ3jqQT6/s5i3TVqTGe7xuqMkg+9Er8rn5nAWgSronsf4nprAfOU8Lj+b06BM
# YRroGgU2lAQrv17liQExrG3Tj1SH+oEp1q0qEq7qo824HlGjBkI=
# =UygB
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 09 Jul 2024 04:51:03 AM PDT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20240709' of https://github.com/legoater/qemu:
machine_aspeed.py: update to test network for AST2700
machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for AST2700
hw/block: m25p80: support quad mode for w25q01jvq
aspeed/soc: set dma64 property for AST2700 ftgmac100
hw/net:ftgmac100: update TX and RX packet buffers address to 64 bits
hw/net:ftgmac100: introduce TX and RX ring base address high registers to
support 64 bits
hw/net:ftgmac100: update ring base address to 64 bits
hw/net:ftgmac100: update memory region size to 64KB
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/44b7329de469...59084feb256c
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